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                        lcd
                        
                          vhdl code fpga  for lcd 2*16                         
                            - 2017-09-22 23:15:51下载
- 积分:1
 
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                        各大IT、软件、硬件公司薪资
                        
                          本文档内容是各大公司的薪资,各位可以了解一下,绝对真实,具体到个位数。                         
                            - 2023-04-05 21:30:03下载
- 积分:1
 
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                        dpll
                        
                          数字锁相环 dpll的 编译通过,使用verilog HDL语言对锁相环进行基于FPGA的全数字系统设计,以及对其性能进行分析和计算机仿真的具体方法(Digital phase-locked loop dpll compiler through the use of verilog HDL language on the phase-locked loop FPGA-based digital system design, as well as its performance analysis and computer simulation of specific methods)                         
                            - 2017-04-04 23:13:28下载
- 积分:1
 
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                        A4_Oscilloscope_Top
                        
                          说明:  数字示波器实验,利用AD、DA和VGA三个外设来实现简易示波器,DA外设发送正弦波给AD外设,AD外设解析成数字信号将数据送给VGA外设进行显示。在VGA上可以看到DA外设发送的波形、波形频率和波形峰峰值。(In the experiment of digital oscilloscope, AD, DA and VGA are used to realize simple oscilloscope. DA peripheral transmits sine wave to AD peripheral. AD peripheral resolves into digital signal and sends data to VGA peripheral for display. The waveform, waveform frequency and peak value of DA peripheral can be seen on VGA.)                         
                            - 2019-03-13 10:45:10下载
- 积分:1
 
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                        adder
                        
                          用于实现FPGA硬件开发使用的加法器,需要注意的是用Verilog语言实现的(The adder used to realize FPGA hardware development needs to be realized in Verilog language)                         
                            - 2020-06-22 03:20:01下载
- 积分:1
 
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                        本代码实现apb总线传输
                        
                          本代码可实现apb总线的配置、传输等功能。代码已经经过仿真、验证,代码注释全面,简单易懂。本代码可实现apb总线的配置、传输等功能。代码已经经过仿真、验证,代码注释全面,简单易懂。本代码可实现apb总线的配置、传输等功能。代码已经经过仿真、验证,代码注释全面,简单易懂。                         
                            - 2022-05-05 19:48:12下载
- 积分:1
 
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                        frame_decode_and_encode
                        
                          一个用Verilog编写的编帧、解帧及码速匹配的程序,相当经典(Verilog prepared with a series of frames, frames and solutions yards speed matching procedures, rather classic!)                         
                            - 2006-07-12 15:10:07下载
- 积分:1
 
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                        xapp888
                        
                          说明:  xilinx fpga各版本mmcm/pll动态配置RTL代码,包括testbench(xilinx fpga mmcm/pll drp RTL code, including testbench)                         
                            - 2021-01-21 21:38:46下载
- 积分:1
 
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                        hilbert_transformer.tar
                        
                          hilbert 变换的vhdl源代码,来源于网上,本人也做过简单的8抽头的,但这个的算法还没搞懂,希望懂行的下载了研究一下,给个中文的简单的说明!(hilbert transform VHDL source code from the Internet, I have been a simple 8-tap, but even before they get to know this algorithm, I hope knowledgeable downloaded to look for a simple description of the Chinese!)                         
                            - 2020-10-19 21:37:25下载
- 积分:1
 
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                        sram_060803
                        
                          SRAM的读写代码,对SRAM进行了乒乓操作,用VHDL语言进行设计,很有参考价值,甚至可以直接复制代码来进行自己的设计(SRAM read and write code, ping-pong operation carried out on the SRAM, using VHDL language design, of great reference value, or even directly copy the code to carry out their own designs)                         
                            - 2020-12-04 10:39:24下载
- 积分:1