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FPGA中嵌入8051的核 并且实现控制128*64的液晶显示
FPGA中嵌入8051的核 并且实现控制128*64的液晶显示-FPGA embedded in 8051 and to achieve control of the nuclear 128* 64 LCD
- 2023-05-15 17:55:03下载
- 积分：1
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sed1335
design the connecter between dsp and sed12
- 2008-08-09 20:36:13下载
- 积分：1
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Roy dsd
basic verilog code on siso, piso, sipo
- 2020-06-25 18:40:01下载
- 积分：1
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SD-Host-Controller-master
说明： sd卡的verilog代码，包含一些sd卡例程(SD card Verilog code, including some SD card routines)
- 2021-04-29 13:48:42下载
- 积分：1
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CPU的VHDL设计代码
应用背景VHDL ；CPU设计...................................................................................................................................................................................................................................................................................................................................................................关键技术VHDL ；CPU设计...................................................................................................................................
- 2022-05-20 23:07:58下载
- 积分：1
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urisc
自己用verilog编写的urisc程序，调试成功，压缩包里有仿真图像，值得学习参考。(Written in verilog urisc program debugging, simulation image compression bag, worth learning reference.)
- 2021-04-22 17:38:48下载
- 积分：1
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responder3
说明： 基于VHDL的多路抢答器，用LCD12864进行显示(Multiplex answering device based on VHDL is displayed with LCD12864)
- 2019-06-17 15:29:31下载
- 积分：1
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UART receiver and transmitter using vhdl
这是执行高速的代码通用异步收发器代码是用VHDL写的语言.UART是一种在传输端进行并行输入和串行输出，在接收端进行串行输入和并行输出的算法。
- 2022-02-06 12:51:51下载
- 积分：1
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dp_xiliux the CPLD Verilog design experiments, serial presentation. code test.
dp_xiliux 的 CPLD Verilog设计实验,串口演示.代码测试通过. -dp_xiliux the CPLD Verilog design experiments, serial presentation. code test.
- 2022-11-12 18:25:03下载
- 积分：1
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FPGA_can
实现基于FPGA的控制MCP2515发送的程序，本人编写通过测试，希望提供帮助(FPGA-based control program sent MCP2515, I write to pass the test, hoping to help)
- 2020-12-31 09:28:59下载
- 积分：1
