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6_ImageBasic
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像基本操作,几何变换,直方图,灰度化处理等(System Generator based image processing engineering, multimedia processing FPGA implementation source code, the basic operation of the image, geometric transformations, histogram, gray processing)
- 2020-10-20 20:07:24下载
- 积分：1
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I2C配置tvp5150用VHDL写的
I2C配置tvp5150用VHDL写的 -I2C configuration tvp5150 written using VHDL
- 2023-05-02 14:30:04下载
- 积分：1
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MyPCICard
是用于pci开发的核，可以将硬件的信息映射到然间上来 节省出开发人员用于了解硬件的时间 (Pci developed for nuclear, hardware information can be mapped to the inter-ran up to save the developers time to understand the hardware)
- 2008-08-10 19:49:03下载
- 积分：1
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regress-900055
The Date prototype object is itself a Date object (its [[Class]] is "Date") whose value is NaN.
- 2013-12-27 00:29:58下载
- 积分：1
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04_uart_test
说明： 基于FPGA，用verilog hdl语言实现串口收发实验(Based on FPGA, using Verilog HDL language to achieve serial port transceiver experiment)
- 2021-03-14 13:43:49下载
- 积分：1
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omp
用于压缩感知 OMP 算法非常适合于压缩感知
- 2022-02-25 10:12:51下载
- 积分：1
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zhentongbu
ＦＰＧＡ在通信上的运用：基于VHDL的帧同步程序(Application of FPGA in communication: Based on VHDL frame synchronization procedures
)
- 2012-11-28 09:10:05下载
- 积分：1
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Xilinx-Timing
Xilinx FPGA 时序约束资料，原厂出品，经典不需要理由(Xilinx FPGA timing constraint information, original, classic no reason)
- 2013-05-17 09:31:26下载
- 积分：1
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Spartan-3E_Starter_Kit
Spartan® -3E 现场可编程门阵列家族是为满足对成本敏感的消费电子大量应用的需要
而特别设计的。
(Field Programmable Gate Array family needs is to meet the cost-sensitive applications, a large number of consumer electronics
Specially designed.)
- 2014-07-10 21:30:34下载
- 积分：1
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decoder_38
这是基于Quartus2 开发环境和verilog hdl语言写的38译码器(This is based development environment and Quartus2 verilog hdl language used to write decoder 38)
- 2013-08-04 09:53:07下载
- 积分：1
