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liuy
一个精确时钟的v-log程序,只用一个全局时钟,增加了精确度(An accurate clock in the v-log program, only one global clock, increased accuracy)
- 2010-08-25 12:26:25下载
- 积分:1
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sram
FPGA控制SRAM读写时序源码,代码桂发,新手一看就懂(FPGA control SRAM write timing source code Guifa novice understand at a glance)
- 2020-06-30 03:00:01下载
- 积分:1
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UART_real_time_clock
This is an UART real time clock
- 2009-06-07 01:21:41下载
- 积分:1
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8位大小比较器
说明: 8位大小比较器的VHDL源代码,Magnitude Comparator
VHDL description of a 4-bit magnitude comparator with expansion inputs(eight compared with the size of the VHDL source code, Magnitude Comparator VHDL description of a 4-bit magnitude comparator inputs with expansion)
- 2005-10-28 22:35:12下载
- 积分:1
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VHDL——如何写简单的testbench
基于VHDL的testbench编写攻略(VHDL based on the preparation of testbench Raiders)
- 2017-07-31 15:00:45下载
- 积分:1
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04_ep2c8_vga_test
VIP FPGA板的配套例子,这个是VGA格式lcd液晶屏幕显示用。(VIP board supporting example of this is the VGA format PREVIEW.)
- 2013-10-18 19:03:37下载
- 积分:1
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04_uart_test
说明: 基于FPGA的串口发送和接收,使用的verlilog语言(Using Verilog serial port program, send and receive.)
- 2020-10-13 10:33:10下载
- 积分:1
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IFFT
OFDM中的IFFF模块实现,基于verilog实现,通过验证(OFDM module in IFFF)
- 2010-05-28 21:16:54下载
- 积分:1
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FPGA-design-
FPGA设计的四种常用思想与技巧分享:串并转换设计技巧、流水线设计思想……(FPGA design of four common ideas and techniques)
- 2013-05-22 22:55:38下载
- 积分:1
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AD4003_CTR
一个AD4003的测试/控制程序,2Ms/s,18bit的AD高速AD芯片(A AD4003 test / control program, 2Ms/s, 18bit AD high speed AD chip)
- 2020-08-24 08:18:16下载
- 积分:1