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the-verilog-code-of-can-usb-i2c
CAN总线，I2C，USB等的FPGA实现源码(CAN bus, I2C, USB, etc. FPGA implementation source)
- 2012-12-15 01:25:33下载
- 积分：1
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32_lvds_test
Xilinx 公司Spartan-6系列FPGA实现LVDS，带Modelsim仿真文件，已综合。(Xilinx Spartan-6 Series FPGA implements LVDS with Modelsim simulation file, which has been synthesized.)
- 2020-11-30 20:59:27下载
- 积分：1
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my_kmp_matching
说明： KMP算法的Verilog HDL实现，模式串从模块的外部输入，计算next函数，然后进行KMP匹配。有仿真。环境为Quartus II 8.0 Web Edition。(Verilog HDL implementation KMP algorithm, pattern string from the module' s external input, calculate next function, then KMP matching. A simulation. Environment for the Quartus II 8.0 Web Edition.)
- 2011-03-14 09:28:01下载
- 积分：1
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Based on quartus a 3
基于quartus的3-8译码器,可作为大型系统的译码器模块-Based on quartus a 3-8 decoder can be used as large-scale system decoder module
- 2022-03-14 15:00:50下载
- 积分：1
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proficient VerilogHDL : IC design example explanation of the core technology
精通VerilogHDL：IC设计核心技术实例详解-proficient VerilogHDL : IC design example explanation of the core technology
- 2022-05-07 13:04:08下载
- 积分：1
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vga
VGA显示控制：时序控制+像素点的颜色处理显示十字光标（vorilog）(VGA Display Control: Timing Control+ pixel color processing and display cross cursor (vorilog))
- 2010-11-27 14:02:12下载
- 积分：1
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2-ADC—单通道（DMA读取）
说明： STM32F103 ADC 通过DMA进行读取(STM32F103 ADC reads by DMA)
- 2020-08-20 15:36:26下载
- 积分：1
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OQPSK
OPSK调制解调。代码思路很清晰，也很干净(Modulation demodulation OPSK. The code ideas very clear, and very clean)
- 2021-03-09 20:39:27下载
- 积分：1
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3input_xor
用Hspice实现一个三输入异或门，并分析其功耗和延时。(A three input XOR gate is implemented by Hspice, and its power consumption and delay are analyzed.)
- 2018-06-12 11:06:45下载
- 积分：1
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crc8
8位crc的verilog设计 通过仿真综合验证并已应用在工程里面
(verilog of 8bit error checkout )
- 2021-03-01 11:09:34下载
- 积分：1
