-
altera 公司的15IP源码
亲自测试还不错 有DIV, CONTER
altera 公司的15IP源码
亲自测试还不错 有DIV, CONTER-ALTERA the 15IP source personally tests are also good DIV, CONTER
- 2022-03-13 02:56:46下载
- 积分:1
-
elecfans.com-verilog教程书
从入门到精通,从简单到难,带你轻轻松松玩转FPGA(It is used to measure noise and detect road noise pollution. It is accurate and has good effect.)
- 2018-03-10 20:48:26下载
- 积分:1
-
DDS_BPSK
基于DDS的BPSK调制器设计Verilog源码( U57FA u4E8.08 u868)
- 2017-04-28 11:44:46下载
- 积分:1
-
USB 1.1 PHY code systemc language USB 1.1 PHY code, systemc languages, including...
USB 1.1 PHY的代码,systemc语言 USB 1.1 PHY的代码,systemc语言,包括基于systemc语言的testbench ,和相关的doc文档-USB 1.1 PHY code systemc language USB 1.1 PHY code, systemc languages, including systemc based testbench language, doc and related documents
- 2022-04-12 00:51:05下载
- 积分:1
-
A4_Uart_Top
说明: 串口! 这是一个使用的通信程序 , 非常好用。(serial port Serial port! This is a communication program used, very useful.)
- 2020-06-17 14:00:01下载
- 积分:1
-
(15-7-2)BCH
Verilog HDL 语言编写的(15,7,2)BCH编码和译码功能(Verilog HDL language (15,7,2) BCH encoding and decoding functions)
- 2020-10-29 11:19:57下载
- 积分:1
-
使用LPM_ROM的实际的例子
使用LPM_ROM的实际的例子-Use of practical examples LPM_ROM
- 2022-10-03 13:00:03下载
- 积分:1
-
cic_4_dec
实现4倍抽取的CIC抽取滤波器模块的Verilog实现,在对数据进行抽取之前,首先进行滤波(Extracted 4 times realize CIC decimation filter module Verilog realize that in the data collected before the first filter)
- 2008-07-08 16:23:03下载
- 积分:1
-
formal_verification
现在最流行的RTL设计方法之一,本书为全球流行的设计入门书籍(One of the most popular RTL design methods nowadays, this book is an introductory book for popular design all over the world.)
- 2020-06-23 22:00:02下载
- 积分:1
-
基于FPGA的钢琴演奏设计
本程序应用VHDL硬件描述语言,以QuartusⅡ8.0为开发工具设计了一个具有自动演奏乐曲功能的系统,演奏乐曲为《梁祝》,具有单曲播放器功能。本程序简单易懂,可作为FPGA入门学习之用。
- 2022-07-26 23:59:39下载
- 积分:1