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FPGA_DSP
《FPGA数字信号处理与工程应用实践附光盘》配套源代码(FPGA DSP and their applications with verilog HDL)
- 2020-07-01 16:00:01下载
- 积分：1
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application-in-card-and-servo-drive
AB相编码器解码接口_PWM输出SOPC方案及其在运动控制卡和伺服驱动器中的应用(AB phase encoder decoder interface _PWM output SOPC program and its application in motion control card and servo drive)
- 2012-03-22 12:44:52下载
- 积分：1
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build a tv box on fpga cyclone 2
build a tv box on fpga cyclone 2
- 2022-03-10 23:00:00下载
- 积分：1
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AlteraFPGA_CPLD
ALTERA FPGA CLPD
- 2010-04-11 14:52:36下载
- 积分：1
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0到255任意整数半整数分频Verilog HDL.rar
0到255任意整数半整数分频Verilog HDL.rar-0-255 arbitrary integer half-integer frequency division Verilog HDL.rar
- 2022-02-06 06:46:57下载
- 积分：1
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本文件解压后clock_time.vhd采用编程环境maxplusII，完成时间秒定时、记时，设置时间秒、声光报警等功能。...
本文件解压后clock_time.vhd采用编程环境maxplusII，完成时间秒定时、记时，设置时间秒、声光报警等功能。-this document unpacked clock_time.vhd maxplusII use programming environment, the time for completion seconds timing, Hutchison, the set-up time seconds, sound, light, alarm functions.
- 2022-07-03 03:02:23下载
- 积分：1
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jiaozhijiejiaozhi
VHDL代码完成行列交织与解交织的功能实现(the realization of interleaver on VHDL language)
- 2020-07-17 15:08:49下载
- 积分：1
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pingball
说明： 这是一个带声音的弹球小游戏，通过VGA口显示，通过扩展口JA的 pin4和 pin GND输出声音， BTN3 BTN2 控制挡板左右移动，弹球和挡板都自带动画效果(This is a band sound pinball game, through the VGA port shows that through the expansion of the mouth of the JA and pin4 output pin GND voice, BTN3 BTN2 control baffle around Mobile, pinball and baffle all bring their own animation effects)
- 2008-11-09 00:34:49下载
- 积分：1
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uvm-1.2.tar
UVM 1.2 golden code, (code for UVM, )
- 2015-02-25 16:37:19下载
- 积分：1
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lab6-3-8DECODER
数字设计和计算机体系结构：用verilog语言描述3-8译码器的设计与实现(Digital design and computer architecture: use verilog language describe 3-8 decoder design and implementation)
- 2016-10-24 17:20:07下载
- 积分：1
