-
lesson1
eda的入门学习课件，老师不错，内容页挺好的(eda learning files)
- 2012-12-14 22:39:31下载
- 积分：1
-
program vending machine at the core function, with three kinds of commodity pric...
程序实现自动售货机的核心功能，设有3种价格的商品，可选择数量，有找钱功能。-program vending machine at the core function, with three kinds of commodity prices, the number of choice, having to function.
- 2022-12-29 09:45:03下载
- 积分：1
-
Realize four kinds of common sine wave, triangle, sawtooth, square wave (A, B) t...
实现4种常见波形正弦、三角、锯齿、方波（A、B）的频率、幅度可控输出（方波
A的占空比也是可控的），可以存储任意波形特征数据并能重现该波形，还可完成
各种波形的线形叠加输出。
-Realize four kinds of common sine wave, triangle, sawtooth, square wave (A, B) the frequency, magnitude controllable output (square wave A, is also a controllable duty cycle), can store arbitrary waveform feature data and can reproduce the waveform, but also completed a variety of linear superposition of the output waveform.
- 2022-09-08 01:55:03下载
- 积分：1
-
SPI
design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip’s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS development board. The sampling frequency is 20kHZ. Use a potentiometer.(design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip' s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS development board . The sampling frequency is 20kHZ. Use a potentiometer.)
- 2010-08-17 19:16:12下载
- 积分：1
-
Roy dsd
basic verilog code on siso, piso, sipo
- 2020-06-25 18:40:01下载
- 积分：1
-
emifa_ram
FPGA与DSP的EMIF通信，EMIF的RAM这方面相应的程序(FPGA and DSP EMIF communication)
- 2020-12-01 15:49:26下载
- 积分：1
-
本例为DAC0832接口电路VHDL原代码
本例为DAC0832接口电路VHDL原代码-The DAC0832 Interface Circuit Example for VHDL source code
- 2022-08-14 02:36:10下载
- 积分：1
-
emmc
emmc协议的实现代码，包含了SD协议，usb实现协议(The implementation code of EMMC protocol)
- 2021-04-08 16:39:00下载
- 积分：1
-
homework32
说明： 这是32位移位寄存器，是用verilog编写的，能够实现从1到31位的左或右的移位(This is a 32-bit shift register, is prepared verilog, can be realized from the 1-31 shift left or right)
- 2009-07-27 15:54:00下载
- 积分：1
-
DE0_VGA
利用FPGA设计游戏设计，真人版超级玛丽，VGA显示(Using FPGA design game design, live-action version of Super Mario, VGA display)
- 2020-11-06 13:09:55下载
- 积分：1
