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232543
FPGA Implementation of QFT based Controller for
a Buck type DC-DC Power Converter and
Comparison with Fractional and Integral Order PID
Controllers
- 2010-08-20 17:53:54下载
- 积分:1
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qianzhaowang
说明: 一个简单的千兆以太网UDP协议的实现,可以实现数据的收发和ARP,实现PC端与FPGA的以太网通信(A simple implementation of Gigabit Ethernet UDP protocol can realize data sending and receiving and ARP, and realize Ethernet communication between PC and FPGA.)
- 2019-01-21 17:18:13下载
- 积分:1
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本设计可直接用作时钟计数器
本设计可直接用作时钟计数器,同时有调时,定时功能。 Led[3:0]显示秒钟的变化情况。 func用作计时,调时,定时功能转换。 Ledarrive用于提示计时时间已到。 change可使秒钟在数码管显示。 plus键在调时计时时使时钟加一。 shift用于调时计时时分计时与时计时的调整转换。
- 2022-12-28 21:25:04下载
- 积分:1
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Vivado基础实验
通过用vivado完成一个流水灯项目手把手教你如何使用vivado,内容十分详细。(Using vivado to complete a running light project, you can learn how to use vivado by hand. The content is very detailed.)
- 2018-12-06 16:14:45下载
- 积分:1
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and VHDL source code
VHDL与源代码包-and VHDL source code
- 2022-07-21 05:42:10下载
- 积分:1
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tiny-dnn-1.0.0a2
在zedboard上运行的神经网络架构,方便移植。(Run lenet-5 on zedboard)
- 2020-06-23 19:00:02下载
- 积分:1
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cpu8bit
这是一个计算机组成原理综合性实验:设计8位cpu。该cpu是8bit的代码,包含有4个寄存器,一个存储器,还有alu以及控制器。一共可以实现16条指令。(This is a computer composition principle of comprehensive experiment: Design 8 cpu. The cpu is 8bit code contains four registers, a memory, as well as alu and controllers. A total of 16 instructions can be achieved.)
- 2020-07-01 08:40:01下载
- 积分:1
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SkanMean
Firmware for autotuning Sensor
- 2015-06-25 20:01:36下载
- 积分:1
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world clock
世界时钟,最简单的vhdl的fpga设计,是vhdl语言的入门级,jigon供参考娱乐
- 2022-01-28 20:54:25下载
- 积分:1
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eluosi_game
使用Quartus II 9.1完成俄罗斯方块游戏,只要使用有VGA和键盘接口的FPGA开发板就行实现。操作简单,使用的是VHDL和Verilog语言(Use the Quartus II 9.1 to complete the tetris game, as long as you use a VGA and keyboard interface implementation of FPGA development board. The operation is simple, the use of VHDL and the Verilog language)
- 2020-11-06 12:49:49下载
- 积分:1