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JV50128
bios spi flash acer 5740g
- 2013-06-28 18:48:06下载
- 积分:1
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LowPassFilter
说明: 内部含3个模块,使用DDS产生200k与500k的正弦波,两者相加后过数字低通滤波(通带0-200k,阻带400k以上),并将波形输出,实测FFT分析中看不到500k分量。其中数字滤波器采用MATLAB设计(FIR+等波纹,阻带衰减-80dB)(There are three modules in the system. DDS is used to generate 200K and 500K sine waves. After adding the two modules, the digital low-pass filter (passband 0-200k, stopband above 400k) is used, and the waveform is output. 500K component can not be seen in the actual FFT analysis. The digital filter is designed by MATLAB (FIR + equal ripple, stopband attenuation - 80dB))
- 2020-09-09 14:21:01下载
- 积分:1
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hdb3
这是一个很全的HDB3译码的verilog程序,用于FPGA入门所用,verilog的入门很好的程序(This is a very wide of the HDB3 decoding verilog program for entry-FPGA used, verilog entry procedures for good)
- 2021-04-22 16:08:48下载
- 积分:1
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defog
说明: 图像去雾算法FPGA实现,使用xilinx Vivado开发环境(Image dehazing algorithm FPGA implementation using xilinx Vivado development environment)
- 2021-02-18 15:49:45下载
- 积分:1
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VHDL--VGA
此VHDL语言程序可以控制液晶屏幕任意动画播放(The VHDL language program can control the LCD screen any animation)
- 2015-03-27 18:44:28下载
- 积分:1
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CfgDDS_9910
dds ad9910配置的verilog hdl程序,模块化设计,输入待配置的数据,字长,启动信号,即可自动产生时序,完成一次配置,模块还有done握手信号,方便用户调用时,反复多次配置。(dds ad9910 configuration verilog hdl program, modular design, the input data to be configured, word length, the start signal, the timing can be automatically generated, complete a configuration, the module has done handshake, user-friendly call, repeatedly configuration .)
- 2015-04-21 22:03:50下载
- 积分:1
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ad0809
adc0809 转换,verilog代码(adc0809 conversion, verilog code)
- 2020-12-21 11:09:08下载
- 积分:1
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digital_lock_vga_display
Altera DE1平台的数字密码锁设计,可以驱动VGA显示(Altera DE1 platform digital password lock design, can drive VGA display)
- 2017-10-31 10:41:38下载
- 积分:1
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QPSK
说明: 基于FPGA的QPSK调制解调电路设计与实现 (QPSK)
- 2010-04-07 14:15:21下载
- 积分:1
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FPGA密码锁状态机的设计
使用的是Verilog HDL编写的状态机的设计。完成的密码锁的解锁,上锁功能,密码锁的修改密码功能,使用的飓风的开发板完成的实验。使用数码管显示密码,用led灯及蜂鸣器提示密码的正确与否,代码比较简单,使用Modlisme仿真的波形比较清楚。代码的注释很多。很适合入门者学习。
- 2022-04-27 06:41:16下载
- 积分:1