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DDS_signal_genarator
这是一个利用verilog语言编写的信号发生器的例子，值得参考(this is a code about signal generator by VIERILOG LANGUAGE!)
- 2013-12-23 10:12:52下载
- 积分：1
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described dds direct digital frequency synthesis of the basic tenets addition to...
讲述了dds直接数字频率合成的基本原理，同时用ＶＨＤＬ语言编写dds原代码用于生成正弦波，并在ISE开发平台进行仿真和MATLAB验证正弦波输出结果-described dds direct digital frequency synthesis of the basic tenets addition to the use of VHDL prepared dds source used to produce sine, and ISE development platform for simulation and verification MATLAB sine wave output
- 2022-07-08 20:48:31下载
- 积分：1
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inc_pid
基于FPGA的增量式PID设计方法，Matlab、Simulink， Xilinx Block set(Incremental PID FPGA-based design methodology)
- 2014-11-03 04:16:19下载
- 积分：1
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用VHDL语言编写的实现8位数据的并串转换，可下载在FPGA中
用VHDL语言编写的实现8位数据的并串转换，可下载在FPGA中-VHDL language with the realization of an 8-bit data, and the string conversion, can be downloaded in the FPGA in
- 2022-04-15 10:43:06下载
- 积分：1
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DE2-chinese-user-manual
友晶 altera DE2开发板中文用户手册，对DE2开发板的完整介绍。(DE2 development board Chinese user manual, a complete description of the DE2 board.)
- 2012-04-12 10:28:30下载
- 积分：1
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- 2022-01-25 14:18:53下载
- 积分：1
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qiartus2use
verilog仿真硬件的工具qiartus2的使用教程,内容简单易懂,初学必备(Verilog simulation tool for hardware qiartus2 the use of tutorials, easy-to-read content, learning essential)
- 2008-06-19 08:03:04下载
- 积分：1
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H.265视频压缩的FPGA实现
说明： 使用verilog语言实现H.265压缩算法，能够实现实时视频数据的压缩传输(Using Verilog language to realize h.265 compression algorithm can realize the compression and transmission of real-time video data)
- 2020-06-29 02:40:01下载
- 积分：1
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Golden Week Ligong Verilog HDL reference guide, learning VerriLog things.
周立功Verilog HDL黄金参考指南，学习VerriLog的东西。-Golden Week Ligong Verilog HDL reference guide, learning VerriLog things.
- 2022-04-28 19:53:04下载
- 积分：1
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华为经典FPGA设计全套入门技巧
说明： 华为FPGA设计全套资料，学习FPGA的朋友可以下载看看。(Huawei FPGA design a full set of materials, friends learning FPGA can download and see.)
- 2019-04-02 13:54:48下载
- 积分：1
