SSI转ABZ信号FPGA程序，测试完全可用(Function of SSI convert to ABZ signal,is available)

VHDL_ 两个电路计数上 / 下液晶显示语言 VHDL (海 mạch đếm lên/xuống hiển 施耐液晶 bằng ngôn ngữ VHDL)

SPH的原始代码，希望可以帮到大家啊关于模拟poiseuille的(simulate poiseuille fuild)

Design HDL code for a circuit that calculates the Hamming distance of two 8-bit inputs.

XAPP585 serdes_1_to_7 and serdes_7_to_1 data

verilog code for 8 bit alu

I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data exchange between devices.

说明：  bnn-fpga是FPGA上CIFAR-10的二进制神经网络（BNN）加速器的开源实现。 加速器针对低功耗嵌入式现场可编程SoC，并在Zedboard上进行了测试。 在编写CIFAR-10测试集中的10000张图像时，错误率是11.19％。(bnn-fpga is an open-source implementation of a binarized neural network (BNN) accelerator for CIFAR-10 on FPGA. The architecture and training of the BNN is proposed by Courbarieaux et al. and open-source Python code is available. Our accelerator targets low-power embedded field-programmable SoCs and was tested on a Zedboard. At time of writing the error rate on the 10000 images in the CIFAR-10 test set is 11.19%.)

说明：  Ovo sto saljem je tutorijal 7 sa vhdlom

说明：  生成一个M伪随机序列码，在ISE平台上可跑通(Generate an M Pseudo-Random Sequence Code which runs on ISE platform)