登录
首页 » VHDL » verilog HDL语言编写的键盘扫描程序,考虑以确定关键的博…

verilog HDL语言编写的键盘扫描程序,考虑以确定关键的博…

于 2022-05-07 发布 文件大小:2.10 MB
0 92
下载积分: 2 下载次数: 1

代码说明:

Verilog HDL编写的键盘扫描程序,考虑了判断按键弹起的问题。程序按一定的频率用低电平循环扫描行线,同时检测列线的状态,一旦判断有一列为低则表示有键被按下,停止扫描并保持当前行线的状态,再读取列线的状态从而得到当前按键的键码;等待按键弹起:检测到各列线都变成高点平后,重新开始扫描过程,等待下一次按键。-Written in Verilog HDL keyboard scanner, taking into account to determine key bounce problem. Program according to a certain frequency of scan lines with low-level circulation lines, while testing out the state line, once the judge has said there is a classified as low-key is pressed, stop the scan and to maintain the current line-line state, and then read out line state to get the current keys key codes to wait for key pop-up: To detect the lines at all out into a high level after the re-start the scanning process, waiting for the next key.

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • LMS算法从opencourse
    本文详细介绍了我们的电气工程项目;
    2022-03-01 15:10:31下载
    积分:1
  • spi_hello
    SPI接口测试程序,Xilinx参考设计,ML507硬件测试通过.(SPI interface test code,Xilinx reference design,tested on ML507 platform.)
    2013-09-01 09:37:04下载
    积分:1
  • a_sistolic_FFT_architecture_for_FPGA
    Description of a sistolic arhictecture for a FFT implementation in FPGA.
    2009-03-24 18:12:27下载
    积分:1
  • WM8731_WM8731L
    wm8731音频编解码芯片使用介绍,该手册里面对该芯片进行了详细的描述,对各个单元模块也进行了详细的阐述(the handbook of WM8721/WM8731L)
    2010-05-20 10:47:30下载
    积分:1
  • test_uart
    基于fpga的uart串口通信协议,64位数据(Uart communication protocol based on fpga, 64-bit data)
    2017-08-09 17:35:47下载
    积分:1
  • matlabfile
    many matlab code with Fftseq ,uniform to gauss AM DSB FM modulation
    2009-12-20 14:06:57下载
    积分:1
  • cpld/fpga Integral comb filter (CIC) design
    cpld/fpga积分梳状滤波器(CIC)设计-cpld/fpga Integral comb filter (CIC) design
    2022-07-08 17:49:24下载
    积分:1
  • dengjingdupinlv
    等精度测频原理的频率计程序与仿真。。希望大家能用的到撒(such precision frequency measurement principles of Cymometer procedures and simulation. . Hope everyone can withdraw to the)
    2006-06-09 18:15:07下载
    积分:1
  • 基于FPGA的实现小数倍分频代码,广泛应用于数字通信中。
    基于FPGA的实现小数倍分频代码,广泛应用于数字通信中。-FPGA-based implementation of a small multiple of sub-frequency code, widely used in digital communications.
    2022-04-19 03:39:18下载
    积分:1
  • VHDLFIFO
    用Verilog 写一个8x16 的FIFO,完成先入先出的功能,并且在FIFO读空时输出EMPTY 有效信号,读指针RP 不再移动;FIFO 写满时输出FULL 有效信号,并且即使WR 有效也 不再向存储单元中写入数据(写指针WP 不再移动)。 (NO)
    2020-09-20 20:17:51下载
    积分:1
  • 696518资源总数
  • 106164会员总数
  • 18今日下载