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FSM
lap trinh FSM may trang thai
- 2014-10-22 15:56:39下载
- 积分：1
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liuy
一个精确时钟的v-log程序，只用一个全局时钟，增加了精确度(An accurate clock in the v-log program, only one global clock, increased accuracy)
- 2010-08-25 12:26:25下载
- 积分：1
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hand_shake
握手程序，可以完美实现跨时钟域的数据传输(handshake and testbench，verilog HDL)
- 2011-11-22 21:05:38下载
- 积分：1
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USART1—USART1指令控制LED灯
说明： stm32f103 usart 控制led灯(STM32F103 USART control LED)
- 2020-08-20 15:37:52下载
- 积分：1
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NIOS II IDE 编程， uart_txd测试程序，仅供参考。
NIOS II IDE 编程， uart_txd测试程序，仅供参考。-NIOS II IDE programming, uart_txd testing procedures, for information purposes only.
- 2022-11-30 03:45:03下载
- 积分：1
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paper7
分数阶Unscented卡尔曼滤波器研究.pdf(Fractional Unscented Kalman filter pdf)
- 2012-12-27 21:00:41下载
- 积分：1
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counter
本例源代码文件由用户按照书中的操作步骤自己生成，“Example-2-1Project_Navigator_Demo源代码”目录下为源代码的参考文件。“Example-2-1Project_Navigator_Democounter”目录下为完整的工程，包括源代码文件、综合与实现的结果文件、ISE工程文件等，可以使用ISE工程管理器打开工程，供读者参考(In this case the source code files by the user in accordance with the steps the book itself is generated, "Example-2-1 Project_Navigator_Demo source" directory as the source code reference document. "Example-2-1 Project_Navigator_Demo counter" directory for a complete project, including source code files, integrated with the realization of the outcome document, ISE project file, etc. You can use ISE Project Manager, open the project for the reader is referred to)
- 2009-09-19 13:53:10下载
- 积分：1
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gtx
说明： ip core of the transceiver gtx
- 2019-04-02 00:10:03下载
- 积分：1
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altfp_matrix_mult
浮点数 矩阵乘法模块 verilog语言编写 可直接调用(Floating-point matrix multiplication module can directly call verilog language)
- 2013-12-18 15:08:36下载
- 积分：1
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DDS
FPGA实现DDS波形发生器，多种信号的产生，(FPGA realization of DDS waveform generator to produce a variety of signals,)
- 2014-07-20 14:31:22下载
- 积分：1
