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Nios-II
niosII的ip核的实现原理讲解，讲解的非常详细。(niosII ip nuclear realization of the principle of explanation, to explain in great detail.)
- 2011-11-03 20:54:13下载
- 积分：1
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移位相加硬件乘法器,基于FPGA的VHDL语言编写的,含有全部文件
移位相加硬件乘法器,基于FPGA的VHDL语言编写的,含有全部文件-displacement add hardware multiplier, based on FPGA VHDL prepared, containing all the documents
- 2022-06-19 21:07:11下载
- 积分：1
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Verilog-detail
不错的verilog学习语言资料，详细地对verilog语言中的重要语句应用进行分析。(A good the verilog learn language information, verilog language statement application.)
- 2013-03-26 13:01:23下载
- 积分：1
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[verilog]dcfifo_256x32
双时钟域FIFO(This is self-defined Dual-Clock FIFO, using logic lut resources.
Dual-Clock FIFO,
Depth: 256
Width: 32
USEDW: Y
FULLL:Y
EMPTY:Y)
- 2017-05-10 13:25:41下载
- 积分：1
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PCM
本例设计一个码率为500kb/s，字长为8 位、帧长为128 个字、帧同步码为EB90H 的PCM 采编器。用VHDL语言实现的。(This designs a code to lead for the 500 kbs|s, the word is long for 8, the growing is synchronous code of for 128 words and for the EB90 H of PCM adopt to weave a machine.Use what VHDL language carry out.
)
- 2021-04-23 17:08:47下载
- 积分：1
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OFDM
OFDM完美出图，信噪比，16QAM星座图，加窗信号时域和频域波形图(Perfect figure, OFDM SNR, 16 qam constellation diagram, add window signal time domain and frequency domain waveform figure)
- 2021-04-15 15:08:54下载
- 积分：1
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Coding Styles for if Statements and case Statements
Coding Styles for if Statements and case Statements
- 2022-02-09 23:54:06下载
- 积分：1
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adc7606
给FPGA程序，使之产生信号，驱动AD7606读取数据，并行模式。(give FPGA signal to read AD7606)
- 2021-03-29 21:39:10下载
- 积分：1
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protel fpga library a popular package is very difficult to find the
protel fpga常用封装库1，非常难找的-protel fpga library a popular package is very difficult to find the
- 2023-04-26 17:30:02下载
- 积分：1
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点阵汉字显示的VHDL原程序.综合实验课程的程序,完全可以用的 希望大家支持啊...
点阵汉字显示的VHDL原程序.综合实验课程的程序,完全可以用的 希望大家支持啊-Dot-matrix characters shown in the original VHDL program. Comprehensive experimental program procedures, can be used to hope you will support the ah
- 2022-03-25 16:49:49下载
- 积分：1
