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一种使用modelsimse6.3简单的复用方案
A program for a simple multiplexer using modelsimSE6.3
- 2022-08-20 11:51:53下载
- 积分:1
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FPGA
基于FPGA的视觉电生理图像刺激系统的设计(Based on the design of FPGA visual electrophysiology image stimulation system)
- 2013-03-08 17:09:29下载
- 积分:1
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汽车尾灯控制系统
汽车尾灯控制器的VHDL程序实现
汽车尾灯控制系统
汽车尾灯控制器的VHDL程序实现
-car taillight control system controller car taillight VHDL program
- 2022-11-01 18:00:03下载
- 积分:1
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dct_verilog
用FPGA实现dct变换。verilog语言实现,在quartus9.0中验证,含整个工程(dct transform verilog language in quartus9.0 verify, with the entire project)
- 2020-12-02 18:59:24下载
- 积分:1
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AVR_Core.tar
CPLD例程(语言)《Verilog HDL数字控制系统设计实例》AVR_Core.tar.gz-.rar(CPLDprogram dialogue /Verilog language design examples)
- 2011-11-12 20:43:49下载
- 积分:1
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利用verilog语言设计公共电话共包括以下几个状态:挂机、待机、身份确认、修改密码、通话等五个状态。内含详细的源码以及设计过程、模块...
利用verilog语言设计公共电话共包括以下几个状态:挂机、待机、身份确认、修改密码、通话等五个状态。内含详细的源码以及设计过程、模块-The use of public telephones were verilog language design include the following states: hang up, standby, identification, change passwords, call the five states. Includes a detailed source code as well as the design process, the module
- 2022-02-25 00:52:03下载
- 积分:1
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单片机的4 am2901完整的VHDL程序,am2901
4位MCU AM2901的完整VHDL程序,AM2901为主程序,其他为实体库-4 MCU AM2901 complete VHDL program, AM2901-based procedures, other entities, the Treasury
- 2022-12-05 05:15:03下载
- 积分:1
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verilog
用Verilog语言编写的产生正弦波和方波的程序(Generate sine and square wave Verilog language program)
- 2021-04-25 20:48:46下载
- 积分:1
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74ls138-integral-4-wire-encoder-16
74ls138组成16..4线编码器 经过本人验证(74ls138 composed of 16 .. 4 line encoder after I verify)
- 2011-09-20 19:00:59下载
- 积分:1
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20080931
Design approach for VHDL and FPGA Implementation of
Automotive Black Box using CAN Protocol
- 2009-10-23 00:20:47下载
- 积分:1