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ethernet_mii_udp_1
说明： Verilog开发的，MII接口的百兆以太网UDP代码(100 megabit Ethernet UDP code of MII interface)
- 2020-03-20 16:19:21下载
- 积分：1
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eetop.cn_cordic_sqrt
cordic 算法知道正弦和余弦值，求反正切，即角度。(The CORDIC algorithm knows sine and cosine values and asks for inverse tangent, that is, angle.)
- 2018-06-29 08:47:12下载
- 积分：1
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MAC_TxScheduler
Ethernet MAC-MII interface of Transmit
- 2014-02-15 00:35:25下载
- 积分：1
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PS2_Core
or1200 PS2_Core code
- 2010-07-18 23:26:44下载
- 积分：1
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apb-uart
apb—uart模块，实现中断处理和异步收发数据并处理(APB - UART module, interrupting processing and asynchronous receiving and receiving data and processing)
- 2020-11-06 14:19:52下载
- 积分：1
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Риторика_Зачетная работа
说明： access must be conf urr arr
- 2019-05-29 20:23:53下载
- 积分：1
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RS
说明： 通过verilog hdl语言实现RS编码器与译码器的设计(Verilog hdl language through the RS encoder and decoder design)
- 2013-07-18 16:09:22下载
- 积分：1
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dds
基于FPGA，利用vhdl语言结合matlab工具实现dds,已经仿真(Based on FPGA, VHDL language with matlab tools to achieve DDS, has simulation)
- 2013-04-22 15:36:08下载
- 积分：1
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tcpip_stack_v1_2
说明： 实现ARP、ICMP、UDP、TCP、IP和MAC全过程的传输，对TCP的连接、接收、发送、断开均经过测试，功能正常(Realize the transmission of ARP, ICMP, UDP, TCP, IP and MAC in the whole process, test the connection, reception, transmission and disconnection of TCP, and the function is normal)
- 2020-05-05 10:03:04下载
- 积分：1
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multiplexersemultiplexer
this project is based on 2*1 and 4*1 multiplexer and 1*2 and 1*4 demultiplexer using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural
- 2009-12-21 18:11:27下载
- 积分：1
