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ahb_verilog_design
代码为ahb interface ，用verilog编写的,包括仿真和综合。(Code for the interface AHB, written in Verilog, including simulation and synthesis.)
- 2020-12-21 14:49:07下载
- 积分：1
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Single-CPU
简单的单周期CPU设计，实现的指令有：算术运算指令、逻辑运算指令、移位指令、比较指令、存储器读/写指令、分支指令、跳转指令、停机指令。(Simple single-cycle CPU design,The instructions implemented are as follows:Arithmetic operation instruction, logical operation instruction, shift instruction, comparison instruction, memory read/write instruction, branch instruction, jump instruction, stop instruction.)
- 2020-06-16 12:28:32下载
- 积分：1
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doorlock
基于FPGA设计的电子密码锁是一个小型的数字系统，与普通机械锁相比，具有许多独特的优点：保密性好，防盗性强，可以不用钥匙，记住密码即可开锁等。(FPGA-based design of the electronic code lock is a small digital system. It has many unique advantages：good privacy and security , it do not need the key but remember password to unlock, and so on while it compare to ordinary mechanical locks.)
- 2013-12-25 21:24:41下载
- 积分：1
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HARRIS 角点检测算法
HARIS角点检测Harris角点检测HARRIS CORENR探测器
- 2023-01-31 13:30:04下载
- 积分：1
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CICFilter
文章运用分级抽取和多相滤波的方法改进传统CIC滤波器的结构,降低了系统工作频率,运用幅度改进函数(ACF)和外加级联余弦预滤波器的技术改进了滤波器频率响应,提出了一种高效的算法结构,改善了通带损耗,增大了阻带衰减,对CIC滤波器的实际应用和深入研究有着现实意义。
(Article the use of hierarchical multi-phase extraction and filtering methods to improve the structure of the traditional CIC filter, reducing the system operating frequency, the use of margin to improve the function (ACF) and the cosine cascade plus pre-filter technology to improve the filter frequency response, the an efficient algorithm to improve the pass-band loss, increases the stopband attenuation of the CIC filter in practical applications and in-depth study has practical significance.)
- 2020-08-14 11:08:27下载
- 积分：1
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fir.tar
FIR滤波器的VHDL语言实现(The implement of FIR Filter based on VHDL)
- 2004-10-19 10:14:56下载
- 积分：1
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FIRDF_design
FIR带通、带阻滤波器设计，需要输入截止频率以及容许偏差。(FIR band pass and band stop filter design)
- 2020-09-28 15:17:44下载
- 积分：1
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generic_dpram
IT IS THE DP MEMORY MODULE. IT CONTROLS THE DP MEMORY
- 2013-09-30 19:03:40下载
- 积分：1
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这个是专门用在ALtera第二代PLD MAXII上的16位微处理器IP核，文档齐全...
这个是专门用在ALtera第二代PLD MAXII上的16位微处理器IP核，文档齐全-this is the ALtera devoted second-generation PLD MAXII on the 16-bit microprocessor IP core, complete documentation
- 2022-02-21 05:05:05下载
- 积分：1
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SSI-ABZ
SSI转ABZ信号FPGA程序，测试完全可用(Function of SSI convert to ABZ signal,is available)
- 2019-05-19 15:37:48下载
- 积分：1
