-
switch--circuit
最近交互式电源技术，软交换、同步整流、频率固定(Alternating expressions Power technology recently、Softswitch, synchronous rectification, fixed frequency)
- 2013-11-25 15:56:17下载
- 积分：1
-
FPGA
学习FPGA的资料，基于FPGA的卡尔曼滤波器的设计与实现(Learning FPGA information, FPGA-based Design and Implementation of Kalman Filter)
- 2010-03-15 21:19:56下载
- 积分：1
-
verilog实现的“六进制约翰逊计数器”。
verilog实现的“六进制约翰逊计数器”。-verilog implementation of the " six hexadecimal Johnson counters."
- 2022-05-10 11:02:11下载
- 积分：1
-
Hardware-CNN-master
说明： Convolutional neural network code for fpga
- 2019-02-27 15:21:22下载
- 积分：1
-
Vhdl_testbench
vhdl 的testbench编写教程，英文ppt以及源码工程(Write tutorials, as well as English ppt Source of engineering vhdl testbench)
- 2016-08-29 10:09:05下载
- 积分：1
-
基于FPGA的数字钟设计
基于FPGA的数字钟的设计，外部时钟32MHz，通过分频器得到秒脉冲，用于正常工作时的计数脉冲。通过分频还得到一个5ms的脉冲，用于按键的消抖（具体原理可见程序）。输入的信号有三个：1.时钟信号2.校时模式设置按键3.校时调整按键，输出通道6位数码管。共有：校时模块，24计数的小时计数模块，60计数的分钟计数模块，60计数的秒钟计数模块。
- 2022-04-01 05:03:17下载
- 积分：1
-
fjq1
介绍了在数字语音通信中, 利用在系统可编程技术和复杂可编程逻辑器件CPLD, 实现了数字语音的复接和分接
对于其中的单稳态电路的数字化和数字锁相环提取位同步信号也进行了详细的设计说明。实际应用结果表明, 系统工作稳
定可靠, 设计是成功的。(Describes the digital voice communications, the use of in-system programmable technical and complex programmable logic device CPLD, to achieve the digital voice multiplexer and demultiplexer for the single steady state in which the digital circuit and digital phase locked loop extraction bit synchronization signals are also carried out a detailed design specification. The practical application results show that the system works stable and reliable design is successful.)
- 2020-12-01 10:39:28下载
- 积分：1
-
可综合的Verilog语法和语义，从大学教师cambri…
《可综合的Verilog语法》国外著名大学老师编写，对于理解verilog HDL文件的可综合与不可综合会有帮助。-synthesizable Verilog syntax and semantics,by teachers from university of Cambridge,It is userful for verilog HDL design.
- 2022-03-31 07:34:29下载
- 积分：1
-
CPLD drives with digital control, of from 0000 to 9999, digital control is a dyn...
用CPLD驱动数码管，实现从0000计到9999，数码管是用动态显示，程序用VERILOG完成的-CPLD drives with digital control, of from 0000 to 9999, digital control is a dynamic display, the program completed with VERILOG
- 2022-05-23 09:34:50下载
- 积分：1
-
XilinxFpgaDesignAndTest
Xilinx fpga 设计培训中文教程,比较好的学习FPGA入门的教程(Xilinx fpga design training for Chinese curricula, better start learning FPGA Tutorial)
- 2020-08-13 15:58:30下载
- 积分：1
