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sdram_module3
能够实现16位的SDRAM的读写,没有仿真文件,只有SDRAM读写的源代码,用Verilog编写(can complete read or write sdram, only include Verilog code and no simulation files)
- 2013-11-25 12:43:11下载
- 积分:1
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vhdl抗抖动滤波器的设计,包括完整的工程
vhdl抗抖动滤波器的设计,包括完整的工程-VHDL anti-jitter filter design, including the complete works
- 2022-04-26 19:29:03下载
- 积分:1
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KEY SCAN VHDL
自己写的键盘的扫描4乘4的键盘VHDL 很好用的-KEY SCAN VHDL
- 2022-07-16 19:10:38下载
- 积分:1
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VHDL hardware design study of 100 cases (chief recommended)
硬件设计VHDL学习100例(站长推荐)-VHDL hardware design study of 100 cases (chief recommended)
- 2023-07-12 20:55:02下载
- 积分:1
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build synthesizer on a de2 dev fpga board
build synthesizer on a de2 dev fpga board
- 2023-07-24 00:25:04下载
- 积分:1
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cpri
基于verilog的cpri接口代码,支持各种速率自由切换,量产产品实际应用代码(Cpri interface based on verilog code, support various rate free switch, production products the actual application code)
- 2015-09-21 16:59:59下载
- 积分:1
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通过VHDL语言的例子,对FPGA的VHDL语言的原型(第六章)是
应用背景FPGA原型的VHDL例子提供一系列清晰,易于遵循的快速代码开发模板;大量的实际例子来说明和强化的概念和设计技术;现实可实施的项目和测试在Xilinx原型板;深入探索和Xilinx PicoBlaze软核微处理器。关键技术本书采用“做中学”介绍VHDL和FPGA技术的概念和设计人员通过一系列的实验方法。
- 2022-03-20 09:59:40下载
- 积分:1
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syn_rd_wr_fifo
该代码实现了FPGA对USB芯片68013的读写,语言是VERLOD,试验通过。(The code to achieve the FPGA read and write 68013 on the USB chip, the language is VERLOD, through the test.
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- 2015-05-02 14:34:16下载
- 积分:1
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Verilog语言编写的电话计费系统,这只是源代码,需要在quartusII等软件下运用...
Verilog语言编写的电话计费系统,这只是源代码,需要在quartusII等软件下运用-Verilog language telephone billing system, this is only the source code, the need to use software such as quartusII
- 2023-01-23 23:25:03下载
- 积分:1
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bmistree_Project_Proposal
project proposal of verilog language that is gud for beginners
- 2011-04-25 00:31:03下载
- 积分:1