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shi01
FPGA上机文件一所以在FPGA中采用同 步设计非常重要 MAX+PLUS II可以计算出数据传输需要(fpga Several of the largest chip operating frequency I would be grateful if the output value of counter FFFFC- FE0FF simulation waveform between the print out (only EPF10K70RC240-4 chips, the maximum allowable Clock frequency)
- 2017-10-24 16:41:14下载
- 积分:1
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Quartus中实现的DDS 使用的是altera提供的IP core
Quartus中实现的DDS 使用的是altera提供的IP core-DDS achieved Quartus using IP core provided by altera
- 2022-07-12 10:39:19下载
- 积分:1
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计数器的VHDL语言
这个程序VHDL计数器计数二进制数并显示脉冲易于程序计数器的VHDL,我们需要了解逻辑电路的VHDL语言的程序员
- 2022-12-04 13:20:03下载
- 积分:1
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d ,t flip flop
该程序是在d,t,jk触发器上用vhdl语言编写的
- 2022-08-23 17:17:57下载
- 积分:1
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cordic
CORDIC(Coordinate Rotation Digital Computer)算法即坐标旋转数字计算方法。 CORDIC算法,能够通过平移和累加快速实现基础的数学函数,包括三角函数,开方,指数,对数,平方根等函数。(CORDIC (Coordinate Rotation Digital Computer) algorithm for the coordinate rotation digital calculation. CORDIC algorithm can be achieved through the rapid translation and accumulation based on mathematical functions, including trigonometric, square root, exponential, logarithmic, square root and other functions.)
- 2020-06-29 13:40:02下载
- 积分:1
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bit7_Binary_to_BCD_LED
二进制转十进制BCD码 Verilog语言 quartusII(Binary to decimal BCD code Verilog language quartusII)
- 2013-09-14 16:49:39下载
- 积分:1
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lcd
1602是目前最常用的显示器件,本例是通过verilog 代码实现1602的显示(1602 display)
- 2011-01-04 14:10:31下载
- 积分:1
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FFT
FFT with fix point 2*N
- 2013-10-06 15:38:38下载
- 积分:1
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这是我自己写的4人表决器源码,在xilinx Spartan3E 上已经调试成功,拿出来与大家分享!...
这是我自己写的4人表决器源码,在xilinx Spartan3E 上已经调试成功,拿出来与大家分享!-that I wrote four voting machine source code, In xilinx Spartan3E debugging has been successful, with the show to share with you!
- 2022-01-27 20:17:47下载
- 积分:1
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inc_pid
基于FPGA的增量式PID设计方法,Matlab、Simulink, Xilinx Block set(Incremental PID FPGA-based design methodology)
- 2014-11-03 04:16:19下载
- 积分:1