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ML605板子上的灯
ML605评估板上的流水灯,可以实现每隔0.16秒进行+1操作
#include
#include
#include
#include
#include
int main()
{
char a[] = "-100" ;
char b[] = "123" ;
int c ;
c = atoi( a ) + atoi( b ) ;
printf("c = %d
", c) ;
return 0;
- 2022-06-01 23:28:16下载
- 积分:1
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4:2优先编码器的VHDL代码
4:2优先编码设计中的VHDL来为每个输入分配优先级。在CMOS布局1复用器:还设计了4个
- 2022-02-11 13:12:33下载
- 积分:1
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xapp1014-xilinx-sdi
用fpga实现SDI,每一步都很清楚 搞视频的可以参考(Fpga realization of SDI, each step are clearly engaged in the video can refer to)
- 2020-11-10 19:19:46下载
- 积分:1
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基于sopc ep2c5开发板的液晶字符显示例程
基于sopc ep2c5开发板的液晶字符显示例程-Sopc ep2c5 development board based on liquid crystal character display routine
- 2022-05-24 11:31:06下载
- 积分:1
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Quartus_17.1破解器_Windows_密码12345
quartus 17.1 安装包,我现在用的就是(Quartus 17.1 installation kit, what I am using now is)
- 2018-09-10 20:13:45下载
- 积分:1
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iic
iic 总线 verilog 源代码
标准i2c总线, 有sda scl 时钟,频率自定(IIC bus standard Verilog source code i2c bus, has sda scl clock, the frequency of self-)
- 2007-10-24 17:52:33下载
- 积分:1
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拥有VGA彩色信号发生器Verilog ISE环境
自己编的VGA彩条信号发生器verilog ise环境-Own the VGA color signal generator verilog ise Environment
- 2023-01-14 23:05:03下载
- 积分:1
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Uart2Sdram2TFT_median_filter
说明: 使用FPGA实现中值滤波算法,能够使数据直接使用该系统对数据进行中值滤波。(FPGA is used to realize the median filtering algorithm, which can make the data directly use the system for median filtering.)
- 2019-12-30 21:27:58下载
- 积分:1
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segment
This source is used to control 7 segments on FPGA boad
- 2014-11-10 13:33:13下载
- 积分:1
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VGA_DE2_6V
VGA显示彩条DE2_70开发板 验证过的(VGA display color bar DE2_70 development board validated)
- 2014-01-07 15:52:09下载
- 积分:1