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VGA显示程序,显示生日快乐
程序是自己编写的,程序的主要功能是实现VGA显示。显示画面为“生日快乐”,并且显示有蛋糕图形。生日快乐四个字可在屏幕上进行流动显示。
- 2022-05-30 10:25:57下载
- 积分:1
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三角函数的Verilog HDL语言实现
以Actel FPGA作为控制核心,通过自然采样法比较1个三角载波和3个相位差为1 200的正弦波,利用Verilog HDL语言实现死区时间可调的SPWM全数字算法,并在Fushion StartKit开发板上实现SPWM全数字算法。(With Actel FPGA as the control core, between 1 and 3 triangular carrier phase difference of 1200 sine wave by natural sampling, realize the adjustable dead time using Verilog HDL language of the SPWM digital algorithm and digital SPWM algorithm is realized in Fushion StartKit development board.)
- 2017-07-08 20:59:23下载
- 积分:1
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IIC
fpga实现的IIC通信的例程,注释很详细(fpga implementation of serial communication routines, comments in great detail)
- 2021-03-24 16:29:15下载
- 积分:1
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liushui
本程序实现流水线功能,您可根据自己需要更改参数,试用芯片xilinx,用verilog语言编写(This program implements the pipeline, you may be required to change the parameters according to their own try xilinx chip with verilog language)
- 2016-03-07 09:26:28下载
- 积分:1
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VerilogDHL
VerilogHDL教程,很详细全面的Verilog教程,循序渐进,由浅入深,十分好的学习资料(VerilogHDL tutorial, very detailed and comprehensive Verilog tutorial, step by step, progressive approach, a very good learning materials)
- 2011-07-13 14:19:53下载
- 积分:1
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gam7
FPGA Implementation ofLow Power 64-Point
Radix-4 FFT Processor for OFDM System
- 2011-01-22 11:45:44下载
- 积分:1
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verilog-axi-master
说明: Verilog AXI Components Readme
GitHub repository: alexforencich verilog-axi
- 2020-11-04 14:39:51下载
- 积分:1
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cfi_ctrl
说明: CFI控制器顶层模块,32位wishbone总线经典接口,用于简化对CFI flash(如块)的访问解锁、删除和编程。(Top level of CFI controller with 32-bit Wishbone classic interface)
- 2020-06-20 17:00:02下载
- 积分:1
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sy3
说明: 多路信号复用基带系统的建模与设计,按位同步复接并掌握四路同步复接器的VHDL设计及系统的时序仿真。(library ieee
use ieee.std_logic_1164.all
use ieee.std_logic_unsigned.all
)
- 2010-04-08 13:01:56下载
- 积分:1
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硬件仿真
说明: 基于FPGA的QPSK系统仿真及验证,硬件部分。(Simulation and verification of QPSK system based on FPGA)
- 2021-02-06 16:21:17下载
- 积分:1