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本程序为24小时计时器，稳定无误差。简单好用，是Verilog HDL语言初学者的指引。...
本程序为24小时计时器，稳定无误差。简单好用，是Verilog HDL语言初学者的指引。-This procedure for 24-hour timer, stable error-free. Easy-to-use, is the Verilog HDL language beginners guide.
- 2022-07-20 09:46:32下载
- 积分：1
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Continuous_acoustic_emission_board
多通道连续声发射数据采集，每个通道最大5M，采用verilog编程，内部用状态机。(Multichannel continuous acoustic emission data acquisition, each channel up to 5M, using Verilog programming, internal state machine.)
- 2020-06-25 13:00:01下载
- 积分：1
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zhinengchezaishipingxitong
设计了车载视频显示系统，设计了基于FPGA系统结构的车载视频显示电路板，利用FPGA显示视频控制，采集通道时许控制等。(The on-board video display system design, design the system structure based on FPGA video shows the circuit board, using the FPGA show video control, acquisition channel make control, etc
)
- 2011-12-08 15:37:21下载
- 积分：1
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VHDL开发环境，四人抢答器，实现了四个人能同时抢答的功能。...
VHDL开发环境，四人抢答器，实现了四个人能同时抢答的功能。-VHDL development environment Answer four, and the realization of the four functions at the same time Answer.
- 2022-07-26 14:54:56下载
- 积分：1
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CORDIC 代码
说明： Xilinx CORDIC 算法 MATLAB Verilog仿真(arctan.m Kn.m sin_cos.m MATLAB Verilog)
- 2019-03-27 09:53:35下载
- 积分：1
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FPGA_PSK
说明： 可以实现2PSK的信号调制，已经过Modelsim波形仿真(It can realize 2PSK signal modulation and has been simulated by Modelsim waveform.)
- 2019-05-09 16:29:17下载
- 积分：1
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FPGA-SRAM_Test
利用FPGA实现SDRAM的读写操作，通过硬件测试。(FPGA implementation using SDRAM to read and write operation, hardware testing.)
- 2011-08-03 22:52:25下载
- 积分：1
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这是用VHDL编写的CRC32
这是利用VHDL编写的一个CRC32的代码，文档只有代码，具体原理请参考其他文献-This is the use of VHDL prepared a CRC32-code, the document is only a code Please refer to specific tenets of other literature
- 2022-12-25 21:15:08下载
- 积分：1
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中科院VHDL学习资料，很好的东西，希望对大家有用
中科院VHDL学习资料，很好的东西，希望对大家有用-Chinese Academy of Sciences VHDL learning materials, a very good thing, everyone would like to be useful
- 2022-09-02 02:55:03下载
- 积分：1
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imply logic
由忆阻器机制设计蕴含逻辑，内含testbench仿真文件(Design implied logic by memristor mechanism, including testbench simulation file)
- 2019-04-24 15:42:24下载
- 积分：1
