-
FPGA2-DSP2-EDMA
例程是基于quartus的，FPGA通过EMIF给DSP发送数据，里面包含了一个简单的状态机和一个基于IP核的fifo，适合初学者(Routine is the FPGA to send data to the DSP via EMIF, which contains a simple state machine and an IP-based core fifo, suitable for beginners)
- 2020-12-04 16:09:24下载
- 积分：1
-
sdcard_mass_storage_controller
A host controlled ot control sd cards
- 2021-04-29 13:58:43下载
- 积分：1
-
EMI
说明： Simetrix EMI滤波器设计，实际测试有效果。(Simetrix EMI filter design, the actual test results are effective.)
- 2019-10-01 22:28:37下载
- 积分：1
-
一个高级培训班的内部资料,非常宝贵,读者可以掌握FPGA的基本思路
一个高级培训班的内部资料,非常宝贵,读者可以掌握FPGA的基本思路-A high-level training of internal information, are very valuable, readers can grasp the basic ideas FPGA
- 2022-03-13 01:35:04下载
- 积分：1
-
module_dem
用verilog编写的信号调制解调程序，包括ask,fsk,qpsk的fpga实现(Prepared using verilog signal modulation and demodulation process, including ask, fsk, qpsk of fpga implementation)
- 2009-10-14 14:47:30下载
- 积分：1
-
sram
FPGA控制SRAM读写时序源码，代码桂发，新手一看就懂(FPGA control SRAM write timing source code Guifa novice understand at a glance)
- 2020-06-30 03:00:01下载
- 积分：1
-
一个8位CISC结构的精简CPU，2还提供了编译器
一个8位CISC结构的精简CPU，2还提供了编译器-an eight streamline the structure of the CISC CPU, the two also provided compiler
- 2022-02-28 11:37:41下载
- 积分：1
-
A counter that starts from 0 and increments mod 16 on each rising edge of the cl...
A counter that starts from 0 and increments mod 16 on each rising edge of the clock
- 2022-09-16 15:40:03下载
- 积分：1
-
ep2c5 实现 定时器
verilog语言，quartus 2 仿真
ep2c5 实现 定时器
verilog语言，quartus 2 仿真-verilog language to achieve ep2c5 timer, quartus 2 Simulation
- 2022-09-22 03:15:03下载
- 积分：1
-
rs_enc
Verilog code for RS-(255,239) encoder.
- 2021-04-06 16:19:02下载
- 积分：1
