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hgfdg
Quartus?
II 相关的语言 详细介绍了VHDL verilog软件开发过程(Quartus ?
II related language detailed introduces the verilog VHDL software development process
)
- 2011-07-31 00:24:42下载
- 积分:1
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dianziqingsheji
实现拟想要的音乐,基于at89s51单片机的电子琴设计!(To achieve the desired music to be based at89s51 keyboard microcontroller design!)
- 2010-05-19 14:01:34下载
- 积分:1
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11_rs485_uart_top
说明: verilog编写的RS485读写驱动程序(RS485 read-write driver written by Verilog)
- 2020-03-08 12:28:10下载
- 积分:1
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VGA_Test
说明: 基于FPGA的VGA驱动代码VHDL
在显示屏显示一个汉字(FPGA-based VHDL code of the VGA driver that a character in the display)
- 2009-08-10 14:55:27下载
- 积分:1
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基于FPGA的神经网络硬件实现中的关键问题研究,适合用fpga研究神经网络的工程人员参考...
基于FPGA的神经网络硬件实现中的关键问题研究,适合用fpga研究神经网络的工程人员参考-FPGA-based hardware implementation of neural networks in the study of key issues for research with neural networks fpga reference works
- 2022-04-17 01:07:47下载
- 积分:1
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veriloghdllicheng135li
Verilog的应用例程,包含了基本的硬件编程,加法器,触发器(Application of Verilog routines, including the basic hardware programming, adders, flip-flop)
- 2010-12-14 20:38:03下载
- 积分:1
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Quartus中实现的DDS 使用的是altera提供的IP core
Quartus中实现的DDS 使用的是altera提供的IP core-DDS achieved Quartus using IP core provided by altera
- 2022-07-12 10:39:19下载
- 积分:1
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利用VHDL实现CPLD(EPM240T100C5)的串口发送程序
利用VHDL实现CPLD(EPM240T100C5)的串口发送程序-Using VHDL realize CPLD (EPM240T100C5) Serial sending procedures
- 2022-12-18 02:35:03下载
- 积分:1
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costas
载波同步,costas环,基于Verilog的载波同步环(Carrier synchronization, costas ring, based on Verilog carrier synchronization ring
)
- 2021-03-05 13:09:31下载
- 积分:1
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CPU
用Verilog实现的 哈佛结构的简单指令集CPU程序,由ALU、地址译码器、指令译码器等部分组成(Part of a simple instruction Verilog realize the Harvard architecture CPU program set by the ALU, address decoder, an instruction decoder, etc.)
- 2016-05-22 10:07:29下载
- 积分:1