-
有业主从PCI PCI、PCI目标是开源的，是项目的发展。
内有一PCI 主 和PCI从，PCI TARGET 都是公开代码的，是工程文件，有仿真工程，使用说明。觉得好的就推荐一下。
本PCI_HOST目前支持：
1、 对目标PCI_T进行配置；
2、 对目标进行单周期读写；
3、 可以工作在33MHZ和66MHZ
4、 支持目标跟不上时插入最长10时钟的等待。
ALTERA的PCI竟然收费的！！！软件里面调试仿真了半天，终于调通了，到了下载就突然弹出窗口说包含了有限制的IP CORE，是限制使用的-There is a PCI from PCI proprietors, PCI TARGET is open source, is the project document, there is simulation project, for use. Feel good about the recommendation. The PCI_HOST currently supports: 1, on the target configuration PCI_T 2, on the target for single-cycle read and write 3, can work in the 33Mhz and 66MHZ 4, to support the goals behind to insert a maximum of 10 clock hours of waiting. ALTERA the PCI even charges! ! ! Inside simulation software debugging for a long time, and finally had transferred to the download on the sudden pop-up window that contains a limited IP CORE, is to restrict the use of
- 2022-06-15 03:52:50下载
- 积分：1
-
AGC
使用FPGA完成AGC 自动增益的代码，适合初学者(FPGA to complete the use of AGC automatic gain code, suitable for beginners)
- 2020-12-28 16:09:01下载
- 积分：1
-
test_ad9852
使用FPGA来控制DDS信号的产生，从而达到高频信号产生的目的。使用的DDS芯片为AD9852，在QuartusII下编写。(Using the FPGA to control the DDS signal generation, so as to achieve high-frequency signal generation purposes. Use of DDS chip AD9852, in the QuartusII prepared.)
- 2010-01-27 17:02:16下载
- 积分：1
-
rc6_decryption
rc6 algorithm designed based on verilog and is verified
- 2020-12-01 21:59:28下载
- 积分：1
-
golomb编码，用于无损图像压缩等，基于quartusii平台。
golomb编码，用于无损图像压缩等，基于quartusii平台。-golomb coding for lossless image compression, based on the platform quartusii.
- 2022-02-15 20:55:31下载
- 积分：1
-
基于Verilog的FFT核
- 2022-10-27 16:20:03下载
- 积分：1
-
简易环形FIFO的设计、简单异步串行通信接口设计等
简易环形FIFO的设计、简单异步串行通信接口设计等-verilog
- 2022-01-25 19:03:58下载
- 积分：1
-
adding
加法器，输入两个整数，用电路图形式将其逻辑原理呈现出来，该加法器为8位运算，每一位都对应一张电路图，可展示其完整过程(Adder, input two integer, with circuit diagram form its logical principle appear, this adder is 8 bit arithmetic, each corresponding to a circuit diagram, can show the complete process)
- 2012-11-19 13:54:32下载
- 积分：1
-
cycloneIII_3c120_dev_power_demo
cycloneIII_3c120_dev_power_demo atlera公司官方例程(cycloneIII_3c120_dev_power_demo atlera company official routines)
- 2014-12-15 17:09:14下载
- 积分：1
-
UART_FPGA
此vhdl程序实现了在FPGA上构建UART通信串口。分为两部分，UART的发送端transfer和接收端receiver。需要外部根据需求提供波特率时钟。(This program implements the building vhdl UART serial interface on the FPGA. Divided into two parts, UART transfer sender and receiver receiver. Required to provide the baud clock external demand.)
- 2015-03-04 11:02:17下载
- 积分：1
|
联系客服（QQ：3324461878）
