登录
首页 » Verilog » 示波器代码

示波器代码

于 2022-06-21 发布 文件大小:19.10 MB
0 106
下载积分: 2 下载次数: 2

代码说明:

可以用于学习的示波器读取显示存储简单处理软件~希望可以对各位有用,用Verilog语言编写而成的,顶层加各个模块的分析,都有,希望有用~~~~~~~~~~~~~~~~~~~~~~

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • lab4showTAs
    4 seg display, button debouncer, and controller for parking meter
    2010-11-10 16:17:42下载
    积分:1
  • dadishu_v1
    VHDL实现简单打地鼠游戏机,北邮数电实验(VHDL simple playing hamster games, BUPT number of electric experiment)
    2020-11-03 13:29:52下载
    积分:1
  • pj_gtx
    说明:  利用高速口GTX进行快速的数据传输,包括接受和发送模块,用途广泛(The use of high-speed port GTX for fast data transmission, including receiving and sending modules, has a wide range of uses.)
    2019-03-25 21:40:10下载
    积分:1
  • GUI
    1)选择一个语音信号作为分析对象,或录制一段语音信号; 2)对语音信号进行采样,画出采样前后语音信号的时域波形和频谱图; 3)利用MATLAB中的随机函数产生噪声加入到语音信号中,使语音信号被污染,然后进行频谱分析; 4)设计用于处理该语音信号的数字滤波器,给出滤波器的性能指标,画出滤波器的频率响应; 5)对被噪声污染的语音信号进行滤波,画出滤波前后信号的时域波形和频谱,并对滤波前后的信号进行比较和分析; 6)回放各步骤的语音信号,给出相应处理程序及运行结果分析。(1) Select a voice signal as an analysis object, or record a voice signal 2) sampling the voice signal, draw the waveform and frequency spectrum of the time domain before and after sampling the speech signal 3) using the random function in MATLAB generated noise was added to the speech signal, the speech signal to be contaminated, and then spectrum analysis 4) for processing the speech signal, the digital filter design, given the performance of the filter to draw the filter' s frequency response 5) on the noise pollution of the speech signal is filtered, time-domain waveform and spectrum draw before and after filtering the signal before and after filtering, and the signal for comparison and analysis 6) playback of the speech signal for each step, given the results of the corresponding processing procedures and run analysis.)
    2021-03-18 17:29:19下载
    积分:1
  • 基于Nios II checksum利用 altera的验证C2H accelerator的系统-Cyclone II
    基于Nios II checksum利用 altera的验证C2H accelerator的系统,已用DE-2 board 验证过, 里面还有DMA 方式的 component,Software Code, Custom Instruction, 和普通的component 各做了比较。 对想了解NiosII 系统的应该有很大的帮助。
    2022-11-11 10:05:08下载
    积分:1
  • TCON
    用verilog编程的TCON模块(时序控制器)的程序(Verilog programming module with TCON (timing controller) program)
    2013-06-26 10:50:59下载
    积分:1
  • ldpc
    ldpc的算法介绍及其fpga上硬件实现(Introduction of LDPC algorithm and Its FPGA implementation)
    2020-06-22 20:40:01下载
    积分:1
  • polyPhaseFilter
    说明:  数字信道化过程中多相滤波器组matlab代码及测试(Digital channelized polyphase filter code and test)
    2019-12-24 09:58:51下载
    积分:1
  • ICAP 回读处理
    通过 ICAP 回读 FPGA内部state register 的状态值。通过状态机控制ICAP,然后写入命令,读取数据,等待三个周期后出现数据。过程中CSIB和RDWRB有一个时序关系,还需要对ICAP输入命令进行bit swap
    2022-04-10 01:05:17下载
    积分:1
  • lic_Xilinx_ISE_Vivado
    这是Xilinx ISE 14.X以及vivado、vivado_hls的license,亲测可用(Xilinx ISE 14.x vivado, vivado_hls license, pro-test available)
    2013-04-26 14:51:09下载
    积分:1
  • 696518资源总数
  • 105559会员总数
  • 1今日下载