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Source
I2C 控制器的 Verilog源程序2(I2C controller Verilog source 2)
- 2008-12-10 16:05:13下载
- 积分：1
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altera EP1C6Q240C6开发板原理图
altera EP1C6Q240C6开发板原理图-altera EP1C6Q240C6 SCH
- 2022-12-08 05:45:03下载
- 积分：1
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VHDL电子钟的设计
（1）用HDL设计一个多功能数字钟，包含以下主要功能：精确计时，时间可以24小时制或12小时制显示；
（2）日历：显示年月日星期；
（3）能用QuartusII软件仿真；
- 2022-08-02 23:44:59下载
- 积分：1
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fdd
按键消抖，对时钟沿计数决定是否将bin值给内部的按键值。(Debounced buttons, whether on the edge of the clock count within the bin value to the key value.)
- 2011-11-08 14:34:08下载
- 积分：1
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Verilog
用Verilog实现一个基于Mesh拓扑结构的路由器网络(Using Verilog to implement a router network based on Mesh topology)
- 2021-03-25 15:49:14下载
- 积分：1
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this project is based on half adder ,full adder,half subtractor and full subtrac...
this project is based on half adder ,full adder,half subtractor and full subtractor using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural techniques are used.
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this project is based on half adder ,full adder,half subtractor and full subtractor using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural techniques are used.
- 2022-12-30 21:40:03下载
- 积分：1
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AD9826
AD9826中文说明书 ，对于学习AD9826元件有很大的帮助。(AD9826 Discription in Chinese)
- 2015-04-12 14:22:34下载
- 积分：1
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ADPCM
说明： APPCM算法和AD/DA芯片驱动在CPLD中的实现，已在实际硬件中测试OK，quartus2环境(APPCM algorithm and AD/DA chip in the drive to achieve in the CPLD has been tested in actual hardware OK, quartus2 environment)
- 2009-08-22 10:07:03下载
- 积分：1
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VGA采用Spartan 3E板系统的VHDL
Vga in vhdl using spartan 3e board basys
- 2023-04-03 19:05:04下载
- 积分：1
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design through verilog hdl
design through verilog hdl
- 2023-04-07 06:25:04下载
- 积分：1
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