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MAX2 EPLD 的测试程序, VHDL语言编写.
MAX2 EPLD 的测试程序, VHDL语言编写.-MAX2 EPLD testing code, VHDL language.
- 2022-01-26 06:18:20下载
- 积分:1
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数码管时钟
利用8段数码管实现的秒表时钟,FPGA使用EP2C80208C8N,通过例化数码管控制模块、秒表计时模块、时钟进位模块等实现准确计时。
- 2022-03-13 13:33:27下载
- 积分:1
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Motor Control PWM wave generated by the procedure, VHDL language
电机控制中PWM波产生的程序,VHDL语言实现-Motor Control PWM wave generated by the procedure, VHDL language
- 2022-07-10 02:37:51下载
- 积分:1
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看了好多网了,发现有2to4译码,3to8译码,今天我要用4to16译码,写完了就发了上来...
看了好多网了,发现有2to4译码,3to8译码,今天我要用4to16译码,写完了就发了上来-saw a lot of net and found 2to4 decoding, 3to8 decoding, today, I must 4to16 decoding, finished on the fat in the ranks
- 2022-03-09 18:15:27下载
- 积分:1
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xilinx CTC IPcore 误码率测试
xilinx CTC IPcore 误码率测试-xilinx CTC IPcore Bit Error Rate Test
- 2022-07-17 12:20:15下载
- 积分:1
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基于FPGA,实现了移位除法的功能,程序接口简单,十分好用,已经验证。...
基于FPGA,实现了移位除法的功能,程序接口简单,十分好用,已经验证。-Based on the FPGA, to achieve the division of functional shift, the program interface is simple, very easy to use, has already been verified.
- 2022-10-14 07:10:02下载
- 积分:1
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VHDL
VHDL上百实例 包括 ADDER LATCH FIPPER AND ETC..(VHDL hundreds of examples, including ADDER LATCH FIPPER AND ETC ..)
- 2010-11-22 05:15:29下载
- 积分:1
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多功能数字时钟 功能齐全 vhdl fp
多功能数字时钟 功能齐全 vhdl fp-Multi-functional digital clock vhdl fpaa
- 2022-06-26 19:16:17下载
- 积分:1
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soft for changing Verilog code to c++ code ,c code
将Verilog代码转换成C++代码的软件,C源代码。-soft for changing Verilog code to c++ code ,c code
- 2022-01-24 14:30:24下载
- 积分:1
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对实例的Nios II开发的源代码,主要基于NIO…
本源码为Nios II的开发示例,主要演示基于Nios II的uCOS的移植。开发环境QuartusII。
本示例十分经典,对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of examples, mainly based on the Nios II shows the uCOS transplant. Development environment QuartusII. This example is very classic, FPGA-based SOPC development of great help for beginners.
- 2022-07-16 15:35:51下载
- 积分:1