登录
首页 » VHDL » QuartusII brochure+ Chinese version of the manual is aimed at readers of Quartus...

QuartusII brochure+ Chinese version of the manual is aimed at readers of Quartus...

于 2022-07-12 发布 文件大小:2.96 MB
0 112
下载积分: 2 下载次数: 1

代码说明:

QuartusII简介手册+中文版 本手册针对的读者是 Quartus II 软件的初学者,它概述了可编程逻辑设计中 Quartus II 软件的功能。 不过,本手册并不是 Quartus II 软件的详尽参考手 册。 相反,本手册只是一本指导书,它解释软件的功能以及显示这些功能如 何帮助您进行 FPGA 和 CPLD 设计。-QuartusII brochure+ Chinese version of the manual is aimed at readers of Quartus II software for beginners, it provides an overview of programmable logic design in Quartus II software. However, this manual is not the Quartus II software, a detailed reference manual. Instead, this manual is a guide book, which explained the functions of the software and show how these features help you to FPGA and CPLD design.

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • recarry
    fir filter 程序 老师上课留的作业,在这里跟大家分享一下,希望能有所帮助(fir filter procedures teacher in the class to stay the operation here to share with you, hope can be helped)
    2006-10-11 19:34:43下载
    积分:1
  • MIT_Press_Circuit_Design_with_VHDL_(2004)
    circuit design with VHDL e-book MIT Press....
    2009-05-08 00:33:54下载
    积分:1
  • vhdl
    说明:  学习VHDL可以用得上,有很多实例,可以对照着自己写一些东西(VHDL can be useful to learn, there are many examples, can be done to write something)
    2008-10-31 20:59:04下载
    积分:1
  • EDAcodelock
    能够在EDA环境下实现四位十进制数字密码锁的设置与开锁功能,并能更改使用密码,还可以防止抖动(EDA environment to achieve four decimal code lock and unlock function of the settings and change the use of passwords, but also to prevent the jitter)
    2009-05-07 09:44:30下载
    积分:1
  • code
    其中两个项目自己做的:一个是雷达模拟跟踪,基于FPGA/CPLD的,里面包含了PCB和VHDL码,还有一个是SDIO的驱动程序(包括PCB原理图,SDIO协议方面的资料还有就是源码,这项目可用),还有一些嵌入式方面的资料,如TCP/IP协议栈的实现,FPGA的一些仿真实例(Two of the projects themselves to do: a tracking radar simulator is based on FPGA/CPLD)
    2007-10-17 16:54:10下载
    积分:1
  • Verilog prepared practical multi
    verilog编写实用多功能电子表-Verilog prepared practical multi-function electronic Table
    2022-04-23 06:46:24下载
    积分:1
  • n_bit_counter
    n bit generic shift registers
    2011-03-18 17:55:19下载
    积分:1
  • shuzishizhong
    基于DE2-115开发板设计的一个数字钟,能进行正常的小时、分、秒计时功能,并分别由开发板上面的数码管显示秒(60s)、分(60min)、小时(24hours)的时间。并具有手动调整时间的功能(DE2-115 board design based on a digital clock, and enables the normal hours, minutes, seconds chronograph function, and were above the development board digital display seconds (60s), points (60min), hours (24hours) time . And has a function to manually adjust the time)
    2020-11-01 11:39:54下载
    积分:1
  • 16位并行相关器的VHDL程序
    16位并行相关器的VHDL程序-16 parallel with the VHDL-related procedures
    2022-02-09 15:11:47下载
    积分:1
  • fifo16_16
    异步的fifo,写时钟和读时钟相互独立,能够对数据进行缓存处理。希望对大家有用(Asynchronous fifo, write clock and the read clock independent of each other, capable of processing the data cache. I hope useful)
    2020-10-26 10:49:59下载
    积分:1
  • 696518资源总数
  • 105885会员总数
  • 31今日下载