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QuartusII brochure+ Chinese version of the manual is aimed at readers of Quartus...

于 2022-07-12 发布文件大小:2.96 MB

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QuartusII简介手册+中文版本手册针对的读者是 Quartus II 软件的初学者，它概述了可编程逻辑设计中 Quartus II 软件的功能。不过，本手册并不是 Quartus II 软件的详尽参考手册。相反，本手册只是一本指导书，它解释软件的功能以及显示这些功能如何帮助您进行 FPGA 和 CPLD 设计。-QuartusII brochure+ Chinese version of the manual is aimed at readers of Quartus II software for beginners, it provides an overview of programmable logic design in Quartus II software. However, this manual is not the Quartus II software, a detailed reference manual. Instead, this manual is a guide book, which explained the functions of the software and show how these features help you to FPGA and CPLD design.

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ch8_1
8选1程序，是利用vhdl编写的，自己弄得还能用，上传下(8 Select a program is written using vhdl, allowed herself can use to upload the next)

2010-06-20 13:36:42下载

积分：1
CPLD_DEMO_OK
可以给VHDL初学者看的实例，全部经过验证(VHDL beginners can see examples of all the proven)

2011-01-12 21:09:45下载

积分：1
digital_clock
说明：数字钟通过verilog实现，并且支持Modelsim仿真，通过实验验证(The digital clock is implemented by Verilog and supports Modelsim simulation)

2020-06-18 05:00:02下载

积分：1
ise
xilinx的时序约束实验，通过阅读本文档，你可以用全局时序约束来轻松提高已有的项目的系统时钟频率，同时你还可以用映射后静态时序报告以及布局布线后静态时序报告来分析你的设计性能(Xilinx timing constraints of the experiment, by reading this document, you can use the overall timing constraints to easily enhance existing projects the system clock frequency, at the same time you can also use static timing report after mapping, as well as after placement and routing static timing analysis report to you design performance)

2007-09-20 14:30:52下载

积分：1
protel library 2 in fpga package, very difficult to find the
protel中fpga封装库2，非常难找的-protel library 2 in fpga package, very difficult to find the

2022-07-03 08:50:31下载

积分：1
binary LDPC DECODER
二进制LDPC解码器：

2022-05-31 06:59:45下载

积分：1
dp_xiliux 的 CPLD Verilog设计实验,流水灯演示.代码测试通过.
dp_xiliux 的 CPLD Verilog设计实验,流水灯演示.代码测试通过. -dp_xiliux the CPLD Verilog design experiments, water lamp demonstration. code test.

2023-08-11 06:35:04下载

积分：1
PipelineCPU
Quartus II 7.2环境中，采用硬件描述语言VHDL独立完成了基于MIPS指令集的32位RISC处理器的逻辑设计(quartusII mips pipeline 32bit cpu design)

2010-05-26 16:51:42下载

积分：1
FPGA源代码
FPGA源代码公布，包括多进制数字频率调制VHDL程序FPGA驱动LCD显示中文字符“年”程序，LED静态显示ADC0809 VHDL控制程序，DAC0832 接口电路程序

2022-04-26 16:23:11下载

积分：1
v5_emac
以太网的FPGA程序实现以太网的FPGA程序实现以太网的FPGA程序实现(enternet verilog fpga)

2013-12-15 23:08:11下载

积分：1

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