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QuartusII brochure+ Chinese version of the manual is aimed at readers of Quartus...

于 2022-07-12 发布文件大小:2.96 MB

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QuartusII简介手册+中文版本手册针对的读者是 Quartus II 软件的初学者，它概述了可编程逻辑设计中 Quartus II 软件的功能。不过，本手册并不是 Quartus II 软件的详尽参考手册。相反，本手册只是一本指导书，它解释软件的功能以及显示这些功能如何帮助您进行 FPGA 和 CPLD 设计。-QuartusII brochure+ Chinese version of the manual is aimed at readers of Quartus II software for beginners, it provides an overview of programmable logic design in Quartus II software. However, this manual is not the Quartus II software, a detailed reference manual. Instead, this manual is a guide book, which explained the functions of the software and show how these features help you to FPGA and CPLD design.

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quanjiaqi
4 级流水方式的8 位全加器。。。。。。(Way flow of 4 full adder 8. . . . . .)

2009-04-29 15:48:35下载

积分：1
verilog_422
标准RS422 Verilog源代码，传输波特率可以修改， FPGA上可以工作(Standard RS422 verilog communication source code, buardrate can be updated and it is fully work in FPGA )

2021-04-06 14:29:02下载

积分：1
ser_to_parr
很有用的10bit串并转换verilog程序，需要的可以拿去参考下，在quartusII上已验证过(Useful 10bit string and convert verilog program, need to take a reference, has been verified in quartusII)

2012-05-21 16:21:22下载

积分：1
i2c
说明：本文研究的IIC总线控制器具有如下特征 1.兼容飞利浦I2C标准，以主机模式与外围设备进行数据通信，对IIC从机模型进行读/读，读/写，写/写，写/读[18]。 2.多主操作 3.软件可编程时钟频率 4.时钟拉伸和等待状态生成 5.软件可编程确认位 6.时钟同步设计 7.仲裁中断丢失，自动转移取消 8.开始/停止/重复启动检测/确认生成 9.总线忙检测(The IIC bus controller studied in this paper has the following characteristics. 1. Compatible with Philips I2C standard, data communication between host mode and peripheral devices, read/read, read/write, write/write, write/read for IIC slave model [18]. 2. Multiple Main Operations 3. Software programmable clock frequency 4. Clock stretching and waiting state generation 5. Software Programmable Confirmation Bit 6. Clock Synchronization Design 7. Loss of arbitration interruption and cancellation of automatic transfer 8. Start/Stop/Repeat Start Detection/Verification Generation 9. Bus busy detection)

2019-06-18 12:18:10下载

积分：1
arbiter_ip
Arbiter code for simulation purpose

2013-07-13 17:45:11下载

积分：1
BISS
说明： biss协议源码交流 verilog hdl源码，测试可用(Biss protocol ,achieved by verilog HDL,can be verify using modelsim or other simtools.)

2020-12-02 09:19:26下载

积分：1
VHDL学习手册
VHDL学习手册-VHDL study manual

2022-06-12 04:27:07下载

积分：1
here is gangadhar call by mailing me
here is gangadhar call by mailing me

2022-01-26 05:55:47下载

积分：1
HDLC接口协议的FPGA实现使用verilog
HDLC接口协议的FPGA实现使用verilog-design of HDLC

2022-06-02 20:47:21下载

积分：1
div_fru
介绍分频器的好资料。不光有奇数分频、偶数分频，还有小数分频。相信把这个资料理解透了后以后分频器的设计就不是问题了。(Introduction divider good information. Not only have an odd frequency, even frequency, there are fractional. I believe understanding this information through the post after the Divider is not a problem.)

2010-06-17 21:52:55下载

积分：1

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