-
VHDL的食谱
The VHDL Cookbook
First Edition
July, 1990
Peter J. Ashenden
Dept. Computer Science
University of Adelaide
South Australia
- 2023-02-13 13:30:04下载
- 积分：1
-
ass1_3_safe
The objective of this project is to design and implement the controller for an electronic safe. You will interface a 16-button keypad to the NIOS boards. The combination code of the safe will be the last
- 2011-03-05 01:17:22下载
- 积分：1
-
I2C控制器源代码，Verilog HDL语言，可以直接调用
I2C控制器的源代码，Verilog HDL语言编写，可以直接调用-I2C controller source code, Verilog HDL language, you can directly call
- 2023-04-28 04:45:03下载
- 积分：1
-
emif_tt
实现dsp与fpga的emif的verilog异步实现，可实现异步读写以及相应功能模块控制，文件中包含仿真后的波形图形以及仿真测试程序，运行环境quartus ii11.0，仿真环境mmodelsim se 6.5d(Achieve dsp and fpga verilog asynchronous implementation of the emif, enabling asynchronous reading and writing as well as the corresponding function module control, the document contains graphics, and after the simulation waveform simulation testing procedures, operating environment quartus ii11.0, simulation environment mmodelsim se 6.5d)
- 2020-12-04 15:59:23下载
- 积分：1
-
main
完整的GMSK调制及维特比译码，程序中包括了高斯滤波器的设计，调制相位的计算，并采用了维特比译码算法解调出原始码元，最后计算了其误码率。(Complete GMSK modulation and Viterbi decoding, the program includes a Gaussian filter design, the calculation of the phase modulation, and uses the Viterbi algorithm demodulates the source element, the final calculation of the bit error rate.)
- 2020-11-03 16:19:54下载
- 积分：1
-
maxplus2为开发环境 vhdl编写的自由 计数器 程序
maxplus2为开发环境 vhdl编写的自由 计数器 程序-maxplus2 VHDL environment for the development of free counter preparation procedures
- 2022-10-02 01:40:03下载
- 积分：1
-
fpga超声波测距
FPGA开发超声波测距，可改写工业探伤或倒车测距等系统，quartus2下选择EP2C5Q208C8（CycloneⅡ） 支持目前淘宝上能买到的所有4-5针超声波模块 应用cycloneⅡ自带除法模块 开发板为有光技术YG2.1 生成电路规模较小 ！！注意：移植程序仅需重新约束数码管和超声波模块的针脚
(Ultrasonic Ranging FPGA development, industrial inspection or reverse rewritable ranging systems, EP2C5Q208C8 (CycloneⅡ) under quartus2 4-5 needle ultrasonic module supports all currently scouring the treasure can buy Applications cycloneⅡ own division module Development board bright technical YG2.1 Small scale generating circuit ! ! Note: The migration program only re-constraint digital and ultrasonic modules Pin)
- 2022-07-17 19:43:35下载
- 积分：1
-
09image_generation
code qui affiche une image sur ecran vga
- 2013-05-09 21:21:10下载
- 积分：1
-
S02《Artix7修炼秘籍》MIG_DDR内存应用
说明： artix 7系列 fpga mig ddr3应用教程(Artix 7 Series FPGA MIG DDR3 Application Tutorial)
- 2020-03-22 12:58:39下载
- 积分：1
-
Microsoft-Word--(11)
信号源模块源程序,可以实现程序模块的实现，然后发生需要的程序(Source module source code, you can achieve the realization of the program modules, and the occurrence of the required procedures)
- 2014-12-30 11:12:32下载
- 积分：1
