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Nios_II_uCOS
本源码为Nios II的开发示例,主要演示基于Nios II的uCOS的移植。开发环境QuartusII。
本示例十分经典，对基于SOPC开发的FPGA初学者有很大帮助。(The source code for the Nios II development of examples, mainly based on the Nios II shows the uCOS transplant. Development environment QuartusII. This example is very classic, FPGA-based SOPC development of great help for beginners.)
- 2009-12-18 14:08:40下载
- 积分：1
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VHDL语言实现PWM信号，非常方便的使用
VHDL语言实现PWM信号，非常方便的使用-VHDL language realize PWM signal, very convenient to use
- 2022-04-25 12:01:37下载
- 积分：1
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SD_W_R
SD卡读写源代码.用Verilog编写.很不错.值得借鉴.特别对SD卡开发的人员!(SD card reader-writer source code. Prepared to use Verilog. Is pretty good. Be used for reference. In particular, the development of personnel SD card!)
- 2020-12-27 22:09:03下载
- 积分：1
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ASIC
介绍专用集成电路设计的一本书，很有参考价值，适合高年级本科生和研究生(Introduction ASIC design a book, a good reference for senior undergraduate and postgraduate)
- 2009-03-23 18:57:53下载
- 积分：1
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tlc549adc
FPGA AD数据采集模块，实现模拟信号到数字信号转换。(FPGA AD data acquisition module, the analog signal to digital signal conversion.)
- 2021-04-14 21:08:55下载
- 积分：1
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乐曲播放器
用vhdl语言编写的程序，可以播放乐曲，有分频模块，可播放梁祝等歌曲。
- 2022-01-21 18:49:47下载
- 积分：1
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VLSIrtl_spi
说明： verilog语言写的SPI接口,全同步设计,低门数,可以很容易应用到嵌入设计方案中.(Verilog language to write the SPI interface, all synchronous design, low gate count. it is very easy to use embedded design programs.)
- 2021-05-13 13:30:02下载
- 积分：1
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Single_cpu
单周期CPU自己课程大作业做的，亲测好用，verilog语言，适用vivado(Single cycle CPU course to do, pro - use, Verilog language, suitable for vivado)
- 2017-12-29 20:15:48下载
- 积分：1
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SR_DDS
DDS信号源设计，有正弦波，方波，三角波，AM波，FM波，还有PSK,FSK,16QAM等多种信号产生。(DDS signal source design, there are sine, square wave, triangle wave, AM wave, FM wave, as well as PSK, FSK, 16QAM and other signal generation.)
- 2016-03-20 22:04:51下载
- 积分：1
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直接频率合成，Quicklogic提供,部分源文件是Quicklogic 专用文件
直接频率合成，Quicklogic提供,部分源文件是Quicklogic 专用文件-direct frequency synthesis, pioneered provide some source document is dedicated ESP
- 2022-01-25 17:31:05下载
- 积分：1
