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ldpc
低密度校验码 ,很好用的代码,功能已经实现编码和译码(fpga ldpc)
- 2014-04-09 10:24:51下载
- 积分:1
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cordic
说明: 16级流水线型cordic旋转代码以及测试文件,亲测好用(16-stage pipelined cordic rotation code and test files, pro-testing)
- 2019-03-09 08:59:01下载
- 积分:1
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altera niosii SOPC helloword learning
altera niosii SOPC helloword 学习-altera niosii SOPC helloword learning
- 2022-10-30 21:55:03下载
- 积分:1
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Verilog
verilog编程语言的讲解,有电子科技大学出版(verilog programming language to explain, there is the University of Electronic Science and Technology Publishing)
- 2013-08-14 09:21:43下载
- 积分:1
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PCIe
本书共由三篇组成。其中第一篇由第1~3章组成,介绍PCI总线的基础知识。第二篇
由第4~13章组成,介绍PCIExpress总线的相关概念。第二篇的内容以第一篇为基础。(This book comprises a total of three components. The first chapter from the first 1-3 chapters, introduces the basics of the PCI bus. Second by the first 4 to 13 chapters, introduces concepts related PCIExpress bus. The contents of the first to second basis.)
- 2020-06-26 17:20:02下载
- 积分:1
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VHDL教学的经典之作,大家学习必看的书籍。
VHDL教学的经典之作,大家学习必看的书籍。-VHDL teaching classic, must-see U.S. study books.
- 2022-12-05 21:15:06下载
- 积分:1
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FPGA_flash设计
我们的设计是用一个FSM控制器来控制发送什么命令,flash模块判断FSM发送过来的state信号来选择应该执行什么操作,当命令写入或者读出后,会发送一个flag_done命令,这个命令让我们判断上个指令是否完成,如果完成后FAM将发送下一个命令.(Our design uses a FSM controller to control what commands are sent. The flash module judges the state signal sent by the FSM to select what operation should be performed. When the command is written or read out, a flag_done command is sent. This command lets us judge whether the last word is finished or if the FAM will be sent after completion. The next command)
- 2018-04-21 21:37:17下载
- 积分:1
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AD_sample
AD采集模块,设计模块采集AD5270的输出数据(AD Collection module
Design module to collect the output data of AD5270
)
- 2020-11-18 16:19:39下载
- 积分:1
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业界标准的Verilog语法格式
说明: verilog标准语法,还有很多的样例参考,学习的好资料。(Verilog standard grammar, there are many examples for reference, good learning materials.)
- 2020-06-15 22:50:02下载
- 积分:1
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VHDL实例应用的经典,大家学习必看的书籍。
VHDL实例应用的经典,大家学习必看的书籍。-VHDL classic example of the application, see U.S. study books.
- 2023-04-30 04:00:04下载
- 积分:1