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一个4×4矩阵键盘接口程序的Verilog设计（FPGA）
一个4*4矩阵键盘的VERILOG接口程序设计（FPGA）-A 4* 4 matrix keyboard interface program Verilog Design (FPGA)
- 2022-07-24 14:37:13下载
- 积分：1
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Noise-cancellation
this contain the source code for noise cancellation ,which can be used in c platform.
- 2012-10-21 23:32:37下载
- 积分：1
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quanjiaqi
4 级流水方式的8 位全加器。。。。。。(Way flow of 4 full adder 8. . . . . .)
- 2009-04-29 15:48:35下载
- 积分：1
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Copy-of-DIGITAL-VLSI-DESIGN
a manual for design implementation of fpga and ASIC using verilog
- 2012-09-04 17:34:58下载
- 积分：1
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sopcAD7352nios
基于sopc的7352的ad模块的nios软核多通道编写,verilog 写的(The sopc 7352 AD module nios soft core multichannel write. Rar
)
- 2012-11-03 21:37:42下载
- 积分：1
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VHDL语言100例详解
说明： 适合入门及进阶的100个VHDL练习题，从易到难(100 VHDL exercises for beginners and advanced students, from easy to difficult)
- 2020-04-10 16:52:07下载
- 积分：1
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Verilog-HDL-tutorial
verilog HDL经典的入门书籍，内容很详细，讲了许多实例，适合硬件描述语言初学者。(verilog HDL classic introductory book, the content is very detailed, spoke many instances, suitable hardware description language for beginners.)
- 2013-10-08 20:21:51下载
- 积分：1
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pin_lv1
一个简易的频率计，主要用检测在一定范围内的频率，当然频率过大会有误差(A simple frequency meter, mainly used for testing in a range of frequencies, of course, frequency of errors over the General Assembly)
- 2010-06-05 10:30:56下载
- 积分：1
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add
浮点加法器的用Verilog实现，32位的浮点加法器(Floating point adder Verilog)
- 2021-02-28 12:49:35下载
- 积分：1
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spi_controller
SPI控制器，基于VERILOG描述，分模块设计，共6个模块，时钟产生模块，移位模块，主模块，从模块，定义模块，顶层模块。(SPI controller, based on the VERILOG description, sub-module design, a total of six modules, clock generation module, shift module, main module, from the modules, custom module, top module.)
- 2021-05-13 13:30:02下载
- 积分：1
