登录
首页 » VHDL » 有关verilog的硬件实现VGA设计的代码。

有关verilog的硬件实现VGA设计的代码。

于 2022-07-17 发布 文件大小:228.71 kB
0 107
下载积分: 2 下载次数: 1

代码说明:

有关verilog的硬件实现VGA设计的代码。-On the Verilog hardware design realize VGA code.

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • digital_tsmc018
    180nm数字教学库,内含各种标准数字单元(180nm digital lib for education, including standard cells)
    2020-12-14 14:49:14下载
    积分:1
  • 异步FIFO的实现可以全面、可核查的]关键词:…
    异步FIFO的实现,可综合,可验证] keywords:almost_full,full,almost_empty,empty-The realization of asynchronous FIFO can be comprehensive, verifiable] keywords: almost_full, full, almost_empty, empty
    2022-03-14 05:09:12下载
    积分:1
  • 包括各种类型存储器的VHDL描述,如FIFO,双口RAM等
    包括各种类型存储器的VHDL描述,如FIFO,双口RAM等 -including various types of memory VHDL description, such as FIFO, Dual Port RAM, etc.
    2022-04-11 16:05:19下载
    积分:1
  • Timer programming, vhdl language, can be achieved when the system timer 24
    定时器的编程,vhdl语言,可以实现24时制定时器-Timer programming, vhdl language, can be achieved when the system timer 24
    2022-09-01 16:25:02下载
    积分:1
  • 这是一个也介绍GPIB编程的文章以及介绍GPIB协议规范
    这是一个也介绍GPIB编程的文章以及介绍GPIB协议规范-This is a GPIB programming also introduced the article and introduce GPIB norm
    2022-06-29 19:43:11下载
    积分:1
  • Version1
    小波包分解,重构轴承振动信号,Hilbert包络,FFT进行频谱分析,以获得轴承故障频率。(Wavelet packet decomposition, reconstruction of bearing vibration signal, Hilbert envelope, FFT spectrum analysis to obtain the bearing fault frequencies.)
    2013-07-17 11:37:05下载
    积分:1
  • dianzibiao
    这是一个数字逻辑课程的电子表的实现,利用VHDL语言实现,初学者可以完全掌握,很有帮助。(This is the realization of the electronic timepiece a digital logic course, the use of VHDL language, beginners can fully grasp and helpful.)
    2016-04-19 17:20:34下载
    积分:1
  • Verilog languages with four arithmetic logic unit ALU, functional reference to 7...
    用verilog语言编写的4位算术逻辑单元ALU,功能参考74181,包含.v文件以及测试用.vwf文件-Verilog languages with four arithmetic logic unit ALU, functional reference to 74,181, including. V documents and testing. Vwf document
    2023-07-06 11:15:03下载
    积分:1
  • FPGA
    说明:  fPGA中的竞争冒险现象的来源及其解决方法(FPGA in the source of the phenomenon of competitive risk-taking and their solutions)
    2008-12-06 17:10:46下载
    积分:1
  • power_control
    四轴动力模块,用一个顶模块控制,输入有:油门(20档);指令;水平仪控制指令,4个输出口(Axis power modules, with a top module control inputs are: accelerator (20 files) instruction Level control instructions, four output ports)
    2013-12-26 20:57:03下载
    积分:1
  • 696518资源总数
  • 105885会员总数
  • 31今日下载