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1
说明： VGA图像显示，可实现图片和实现移动功能(VGA image display, enabling images and moving functions to achieve)
- 2014-07-03 11:17:12下载
- 积分：1
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007
给大家上传一本非常好的关于verilog-hdl的电子书，实用，易懂，易学。此为第七章(Give us a very good upload on verilog-hdl of e-books, practical, easy-to-understand, easy to learn. This is the Chapter VII)
- 2008-04-22 16:53:33下载
- 积分：1
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5L_SVPWM_ANPC_CPLD
基于CPLD硬件描述语言编写的五电平SVPWM脉冲触发程序(Five level SVPWM pulse trigger program based on CPLD hardware description language)
- 2020-12-14 16:19:15下载
- 积分：1
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Based on the VHDL language for selecting the three sequences, you can have a cyc...
基于VHDL语言的3级序列的产生，可以循环产生周期为7的m序列
-Based on the VHDL language for selecting the three sequences, you can have a cycle for cycle 7 m sequence
- 2023-08-16 17:00:04下载
- 积分：1
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123456789
给出了SVPWM算法的详细FPGA实现方法！(A detailed FPGA SVPWM algorithm to achieve the method!)
- 2017-04-05 13:50:53下载
- 积分：1
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222
说明： VHDL BISS,SSI,ENDAT2.2, ENCODER
- 2020-11-24 17:46:39下载
- 积分：1
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RISC
URISC的RTL级设计，Verilog代码(Design: URISC RTL Verilog)
- 2019-06-16 23:07:39下载
- 积分：1
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VHDL 0~
程序用VHDL实现：
利用一秒定时测量频率
并且显示，范围0~-VHDL 0~
- 2022-05-15 03:55:50下载
- 积分：1
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用VHDL写的4*4乘法器，学习VHDL语言的可以
用VHDL写的4*4乘法器，学习VHDL语言的可以-Use VHDL to write the 4* 4 multiplier, learning VHDL language can be
- 2022-02-11 23:38:12下载
- 积分：1
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CPLD drives with digital control, of from 0000 to 9999, digital control is a dyn...
用CPLD驱动数码管，实现从0000计到9999，数码管是用动态显示，程序用VERILOG完成的-CPLD drives with digital control, of from 0000 to 9999, digital control is a dynamic display, the program completed with VERILOG
- 2022-05-23 09:34:50下载
- 积分：1
