stepper motor module on spartan 6 and 24MHz clock fequency

数字钟，简单的数电应用，电子表源程序，常用也使用-watch

这是一个16位乘法器Verilog程序，包括有符号位和无符号位乘法器(This is a 16-bit multiplier Verilog program, including the sign bit and no sign bit multiplier)

Implementarea unui comparator pe 1 bit

UART功能,可以增加在NIOS2內,主要來做外部Flash的擦除及寫入,需搭配上位機傳輸字串來控制(UART function, can increase the NIOS2, the main external Flash to do the erase and write, to be a string with the host computer to control the transmission)

vhdl 语言实现的lms算法的自适应滤波器 两种实现方式 包括改进(VHDL language lms algorithm adaptive filter implemented in two ways including improved)

很好的学习FPGA嵌入式的资料！适合初学者和工程师参考！(Good learning FPGA embedded information! Suitable for beginners and engineers reference!)

本程序设计一个基于FPGA的4相步进电机定位控制系统。由步进电机方向设定电路模块、步进电机步进移动与定位控制模块和编码输出模块构成。前两个模块完成电机旋转方向设定，激磁方式设定和定位角度的换算等工作，后一个模块用于对换算后的角度量编码输出。-This procedure to design an FPGA-based 4-phase stepper motor positioning control system. Direction set by the stepper motor circuit module, stepper motor stepper movement and positioning control module and the code output modules. The first two modules complete the motor rotation direction setting, exciting way of setting the angle and positioning of the conversion work, after a module for the point of view of the volume of converted output encoding.

该代码实现了FPGA对USB芯片68013的读写，语言是VERLOD，试验通过。(The code to achieve the FPGA read and write 68013 on the USB chip, the language is VERLOD, through the test. )

说明：  网口UDP的FPGA仿真代码，经过测试能够实现预想功能(etherneit udp verilog fpga code)