用verilog语言编译的pci协议实现，而且有具体的电路图(Compiled with the verilog language pci protocol implementation, but also the specific circuit)

AVR IP CORE 可以直接用于工程的开发和 已经通过编译和仿真-AVR IP CORE can be directly used for project development and has passed the compiler and simulation

Frequency meter Verilog implementation for Xilinx XC2C256. MT10T7 7-seg LCD used for output.

Interfacing RTC with spartan 3

FM接收机 基于FPGA的调频收音机的设计 用VEIRLOG语言编程，利用QUARTUSii与MODELSIM联合仿真(FM receiver on FPGA FM receiver design With VEIRLOG language program, use QUARTUSii and MODELSIM joint simulation)

4位MCU AM2901的完整VHDL程序，AM2901为主程序，其他为实体库-4 MCU AM2901 complete VHDL program, AM2901-based procedures, other entities, the Treasury

adc0809用FPGA控制的采样非常好用的实例 自己看书后终结的-ADC0809

RISC 5级流水线CPU，带HAZARD处理(RISC 5 pipeline CPU with HAZARD processing)

HARQ技术研究，以喷泉码为研究对象，结合LDPC纠错码而研究的。(HARQ technology research to fountain codes for the study, and research combined with LDPC error correction code.)

FPGA Verilog HDL模拟IIC通讯接口-FPGA Verilog HDL IIC Interface