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简易数字信号分析仪(眼图)

于 2022-07-22 发布 文件大小:5.77 MB
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代码说明:

采用VHDL语言编写,此题为全国大学生电子设计竞赛题目,产生一个伪随机信号,并用时钟提取模块提取时钟,最终能在示波器上获得眼图,验证实验结果。此程序已经经过本人亲自验证,完全可用,可用于电赛培训之中。

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