-
TLC5615 FPGA(EP2C08)
用Verilog硬件语言驱动TLC5615 DAC芯片,可输出方波,并且频率可调
- 2023-08-22 20:10:05下载
- 积分：1
-
verilog-learning-of-HuaWei
华为公司学习verilog的资料，绝密资料，想学习verilog编程，想学习FPGA，想以后进华为公司的都可以看看。(Huawei learning verilog information, confidential information, want to learn verilog programming, want to learn FPGA, think later into the Huawei can see.)
- 2013-07-23 14:48:30下载
- 积分：1
-
Stumper.cpp
Convert Roman numerals to integers
- 2012-12-05 03:59:59下载
- 积分：1
-
halfband
verilog写的39阶通带为20KHz的半带fir滤波器，经测试正确。(verilog halfband FIR)
- 2020-12-25 14:29:04下载
- 积分：1
-
uart_rx
uart接收模块
// 波特率：9600
// 数据位：8
// 停止位：1
// 校验位：0(UART receive module
Baud rate: 9600 /
/ / data: 8
/ / stop: 1
/ / check digit: 0)
- 2017-07-10 13:56:54下载
- 积分：1
-
rs-decoder-make-byvhdl
- RS码是Reed-Solomon 码（理德－所罗门码）的简称，它是一类非二进制BCH码，在RS码中，输入信号分成k·m比特一组，每组包括k个符号，每个符号由m个比特组成。(- RS code is a Reed-Solomon code (Reed- Solomon codes) for short, is a non-binary BCH code, the RS code, the input signal is divided into a set of k · m bits, each including k symbols, each symbol consists of m bits.)
- 2021-04-28 15:58:44下载
- 积分：1
-
Verilog LED 斯巴达 6
此代码是 verilog 代码和斯巴达 6 模型规范代码。欢迎大家下载、试用。谢谢大家的支持。
- 2022-03-01 23:14:35下载
- 积分：1
-
6_Sets_of_8051_VHDL_Verilog
it has 6 packages of 8051 sources,including source code(VHDL and Verilog),dc scripts, pdfs, netlists etc. and a MIPS IP package
- 2012-07-02 10:56:02下载
- 积分：1
-
BT1120转GTX详细设计方案
bt1120设计方案，描述了具体的方案设计以及整体的架构设计(Bt1120 design scheme, describes the specific scheme design and the overall architectural design)
- 2020-06-25 05:40:02下载
- 积分：1
-
VHDL
用VHDL语言实现一Mealy型时序电路，并做时序仿真和功能仿真检验正确与否。(Implement a Mealy-type sequential circuits using VHDL language, and do functional simulation and timing simulation test correct.)
- 2014-03-20 14:44:28下载
- 积分：1
