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dac5687_interface
说明: verilog语言编写的dac5687的接口程序,串行模式控制。(written dac5687 verilog interface program, serial mode control.)
- 2021-04-23 09:38:48下载
- 积分:1
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21452547
加减可控制的十到十六进制计数器。完全准确,可以放心使用的(Add and subtract controllable ten to hexadecimal counter. Entirely accurate, can be at ease of use)
- 2016-01-11 12:46:04下载
- 积分:1
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vjtag
说明: quartus vitual jtag代码使用接口,通过该接口模板方便使用者通过jtag在线读取FPGA的数据。(The quartus virtual JTAG code uses an interface, through which users can read FPGA data online.)
- 2020-05-06 09:42:50下载
- 积分:1
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awb
自动白平衡的verilog实现
通过逻辑实现了白平衡算法(awb design awb design awb design awb design awb design )
- 2012-09-04 13:09:50下载
- 积分:1
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using VHDL prepared by the LED display driver circuit design source
用VHDL语言编写的LED显示器驱动电路的设计源程序-using VHDL prepared by the LED display driver circuit design source
- 2023-07-22 14:55:03下载
- 积分:1
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TEXTIO_Import_txt_Matlab
将FPGA设计仿真结果数据写入到txt记事本中,然后通过Matlab读取txt中的数据并显示图像(write the FPGA simulation result data into textbook,and read these data from textbook and display image in Matlab)
- 2012-12-28 13:42:57下载
- 积分:1
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DDR3_user_design
在Xilinx开发环境ISE13.2上用MIG产生的DDR3 SDRAM控制器,里面生成了Core,可用于DDR3读写控制(On the Xilinx development environment ISE13.2 generated with MIG DDR3 SDRAM controller, which generates the Core, DDR3 can be used to read and write control)
- 2012-02-02 15:16:00下载
- 积分:1
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FIFO
FIFO的源代码,对FIFO设计有帮助,有借鉴意义,帮助学习VHDL编程(FIFO of the source code, on the FIFO design help, there is reference to help learn VHDL programming)
- 2008-04-29 09:00:11下载
- 积分:1
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豪华的CPU的VHDL代码的大学
DLX CPU VHDL CODE UNIVERSITY
- 2022-05-06 01:12:25下载
- 积分:1
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学生基本Verilog
basic verilog for students
- 2022-09-22 04:00:04下载
- 积分:1