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EDA 双向端口的输入输出程序 快点来下在啊
EDA 双向端口的输入输出程序 快点来下在啊 -EDA port bi-directional input and output procedures to hurry up in the ah
- 2022-04-22 18:44:53下载
- 积分:1
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bit7_Binary_to_BCD_LED
二进制转十进制BCD码 Verilog语言 quartusII(Binary to decimal BCD code Verilog language quartusII)
- 2013-09-14 16:49:39下载
- 积分:1
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FPGA-based--DC-speed-controller
针对某船舶模型定位系统中调速电机,以FPGA(现场可编程门阵列)为控制器,采用数字比例积分调节器实现电机的速度控制算法,设计出数字化调速控制器(Positioning system for a ship model in the motor speed, the FPGA (field programmable gate array) for the controllers, proportional integral regulator with digital speed of the motor control algorithm, designed digital speed controller)
- 2011-05-17 15:50:57下载
- 积分:1
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apb_spi
Simple SPI interface realization on Verilog HDL with parameterized FIFO and APB interface
- 2021-04-06 16:19:02下载
- 积分:1
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these files are written in verilog but i am uploading in text format
these files are written in verilog but i am uploading in text format
- 2022-01-26 00:53:26下载
- 积分:1
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FPGA
spwm dcac逆变 fpga与单片机一起作用(sdad)
- 2010-08-12 18:20:08下载
- 积分:1
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用walsh算法实现的符号数乘法器,asic流片时,可以不用公司的付费乘法器的ip core....
用walsh算法实现的符号数乘法器,asic流片时,可以不用公司的付费乘法器的ip core.-algorithm using the symbols multiplier, HDL-piece quantities. it is not necessary for the company"s paid Multiplier ip core.
- 2022-03-30 14:40:42下载
- 积分:1
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基于VHDL语言描述的一个分频器,根据端口值,可作为四分频,八分频等分频器使用。...
基于VHDL语言描述的一个分频器,根据端口值,可作为四分频,八分频等分频器使用。-based on VHDL description of a divider, according to port value, as a quarter of frequency, Frequency Divider interval such use.
- 2023-01-22 19:55:03下载
- 积分:1
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VHDL3
说明: 一个使用VHDL进行正弦波信号产生的历程,非常有用。(A sine wave signal generator using VHDL for the course, very useful.)
- 2010-03-27 09:18:41下载
- 积分:1
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Electric Guitar Digital Effects Processor
Electric Guitar Digital Effects Processor
- 2022-11-09 05:15:03下载
- 积分:1