-
dac
简易函数发生器，能产生正弦波，三角波，梯形波，方波，并且可调频率和幅度值。(Simple function generator can produce sine, triangle wave, trapezoidal wave, square wave, and the adjustable frequency and amplitude values.)
- 2011-08-28 14:11:37下载
- 积分：1
-
6264
6264是一种8K×8的静态存储器.SRAM 的典型芯片有2KB 的6116、8KB 的6264 以及32KB的62256,其中6264 芯片应用最为广泛.(6264 is the 62256 typical chip SRAM.SRAM a 8K* 8 with 2KB 6116, 8KB 6264 and 32KB 6264 chip, which is most widely used.
)
- 2015-02-01 13:28:11下载
- 积分：1
-
Writing-a-VHDL-Testbench
《编写VHDL测试概述》的英文原版讲述了如何使用VHDL写测试凳程序("Writing VHDL test overview" of the English original to write about how to use VHDL test bench program)
- 2014-04-03 21:57:01下载
- 积分：1
-
this document is in two MAXplusII environment through the development and operat...
此两文件是在MAXplusII环境下开发并运行通过的VHDL文件，实现了并串口转换功能。-this document is in two MAXplusII environment through the development and operation of the VHDL documents, and the realization of serial conversion function.
- 2022-02-26 14:17:56下载
- 积分：1
-
StandardSystemVerilog
这本书主要描述了如何使用system Verilog 建立测试平台和行为级模型(This book will describe how to use the system Verilog test bench and the establishment of behavioral models)
- 2010-05-12 10:35:54下载
- 积分：1
-
CPLD / FPGA解码器RS（204188）of the Verilog程序
cpld/fpga RS(204,188)译码器的verilog程序-cpld/fpga RS (204,188) decoder of the Verilog program
- 2023-05-10 18:05:03下载
- 积分：1
-
myconstellation_final_2
bpsk qpsk 16qam 64qam的constellation(bpsk qpsk 16qam 64qam constellation)
- 2021-03-03 01:49:33下载
- 积分：1
-
This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Educati...
This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.
- 2022-02-12 08:59:26下载
- 积分：1
-
DCT_IDCT
H264/AVS中的离散余弦变换DCT以及反离散余弦变换IDCT的Verilog代码(H264/AVS the discrete cosine transform and inverse discrete cosine transform DCT IDCT of Verilog code)
- 2011-06-11 07:08:30下载
- 积分：1
-
filter
说明： A low pass filter module based on FPGA, easy to transplant
- 2020-05-04 10:21:42下载
- 积分：1
