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DTMB
能够完美产生数字地面电视(DTMB)的信源的程序。帧头模式为模式一。信道可选择,信号加入频偏,延时,后经滤波器后输出。(Able to produce perfect digital terrestrial television (DTMB) of the source program. Mode is the mode a header. Channels to choose from, the signal adding offset, delay, after the filter output.)
- 2013-07-25 11:22:28下载
- 积分:1
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mimaiic
基于AT89C51的密码锁(掉电可记忆密码)的程序(Based on AT89C51 lock (down to remembering passwords) program)
- 2013-06-06 11:38:13下载
- 积分:1
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位同步实验程序参考bitsynchro
自己写的位同步实验程序参考,该算法需要发送和接收方的频率比较稳定时,可以很快地达到位同步,且十分稳定。位同步是通信技术的基础之一,希望对大家学习有所帮助。(The program is a reference used for bitsynchro writed by myself.When the both send s and receive s frequency are stable,the program can reach bitsynchro fastly.)
- 2013-02-01 11:21:03下载
- 积分:1
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TLC1620
基于FPGA的Verilog语言实现的六十进制计数器(FPGA-based Verilog language implementation of six decimal counter)
- 2015-04-23 16:23:15下载
- 积分:1
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sdr_sdram
文章详细讲述了sdr_sdram控制器的使用和编程思想(sdr_sdram)
- 2009-06-11 01:48:25下载
- 积分:1
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这是一个数字时钟数字逻辑电路,整个工程包上传…
这是一个数字时钟的数字逻辑电路,整个工程打包上传,时钟可以计时、校时、整点报时、定时闹钟。使用电路图实现的。在quatarsII里面仿真的并且下载到DE2板上运行过。-This is a digital clock digital logic circuits, the whole project package upload, the clock could be time, school hours, the whole point timekeeping, timing alarm clock. The use of circuit implementation. The quatarsII inside the simulation, and downloaded to the DE2 board to run-off.
- 2022-08-06 10:22:24下载
- 积分:1
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New-Folder
to learn bout development of vhdl code
- 2014-03-15 16:21:38下载
- 积分:1
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由VHDL 语言实现的数控分频
利用的是QUARTUES环境已经得到验证...
由VHDL 语言实现的数控分频
利用的是QUARTUES环境已经得到验证-By the NC VHDL language is the use of sub-frequency QUARTUES environment has been tested
- 2023-01-20 00:20:04下载
- 积分:1
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eeprom
I2C EEPROM 存取源碼, 通用ATMEL(I2C EEPROM read/write)
- 2012-09-19 19:59:12下载
- 积分:1
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eDP
eDP接口TFT-LCD显示驱动原码(verilog+c)(eDP Interface TFT-LCD display driver source code (verilog+c))
- 2020-10-17 09:17:27下载
- 积分:1