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用VHDL语言实现的图像传感器TCD132D的时序驱动代码,时序精准!
用VHDL语言实现的图像传感器TCD132D的时序驱动代码,时序精准!-VHDL language with the image sensor TCD132D realize the timing-driven code, timing accurate!
- 2022-01-26 02:25:08下载
- 积分:1
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freeDev数字应用开发板中的七段数码管的IP核的verilog实现
freeDev数字应用开发板中的七段数码管的IP核的verilog实现-freeDev digital application development boards in the seven-segment digital tube of the IP core implementation of the verilog
- 2022-01-31 19:57:07下载
- 积分:1
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2-ADC—单通道(DMA读取)
说明: STM32F103 ADC 通过DMA进行读取(STM32F103 ADC reads by DMA)
- 2020-08-20 15:36:26下载
- 积分:1
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pipelined_fft_256
verilog编写的并行256点fft代码(Verilog prepared parallel 256 points fft code)
- 2017-06-28 21:56:53下载
- 积分:1
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在SOPC Builder的UART IP核接口
UART RS232 IPCORE for sopc builder
-RS232 UART IPCORE for sopc builder
- 2022-03-04 13:15:40下载
- 积分:1
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Motor Control PWM wave generated by the procedure, VHDL language
电机控制中PWM波产生的程序,VHDL语言实现-Motor Control PWM wave generated by the procedure, VHDL language
- 2022-07-10 02:37:51下载
- 积分:1
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在 2 线液晶电视 DISPLAY(KHỞI TẠO HIỂN THỊ LCD HIỂN THỊ 2 HÀNG) CODE_VHDL_INITIALIZING
- 2022-08-23 23:23:25下载
- 积分:1
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usbFPGAconnect
该例程是PC机通过FX2-CY7C68013-A的USB2.0控制芯片与FPGA实现通信。其中的工程和代码包括PC机上的USB固件程序、驱动程序、上位机程序,FPGA上的VERILOG通信程序。(The routine is a PC, through the FX2-CY7C68013-A of the USB2.0 controller chip and the FPGA to achieve communication. One of the projects and code, including PC, the USB firmware, drivers, FPGA' s Communication Program)
- 2021-04-08 15:19:00下载
- 积分:1
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电子手表
在硬件上实现,可以实现一般电子表的功能。比如说计时,显示日期,秒表等功能。还可以显示星期数,可以正常的区分闰年等。并且仿真文件也在其中,反正了其时序变化情况。比较详细。必要出有注释。
- 2022-07-08 11:11:12下载
- 积分:1
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GFverilog-hdl
伽罗华域的乘法器的设计,使用有限域设计乘法器(Galois field multiplier design, the use of finite field multiplier design)
- 2011-05-01 13:19:22下载
- 积分:1