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                        示波器设计源工程
                        
                          说明:  示波器设计,首先,AD模块对模拟信号进行采样,触发电路根据采样信号判断触发条件。满足触发条件后,连续采样一定数量的点(本系统中为640个点),存储到RAM中。峰峰值、频率计算模块对RAM中储存的波形数据进行计算,得到波形的频率以及峰峰值;VGA模块将波形显示出来,并显示计算得到的峰峰值和频率数值。(Firstly, the ad module samples the analog signal, and the trigger circuit judges the trigger condition according to the sampling signal. After meeting the trigger conditions, a certain number of points (640 points in this system) are sampled continuously and stored in RAM. The peak to peak and frequency calculation module calculates the waveform data stored in RAM to obtain the frequency and peak to peak of the waveform; the VGA module displays the waveform and displays the calculated peak to peak and frequency values.)                         
                            - 2021-01-02 17:29:54下载
- 积分:1
 
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                        Synthesis of Majority/Minority Logic Networks
                        
                           ;随着CMOS技术达到其物理极限,新技术                         
                            - 2023-05-15 00:50:02下载
- 积分:1
 
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                        project1source
                        
                          sdh帧同步,实现sdh帧搜索,预同步,同步,保护等各态的功能(SDH frame synchronization SDH frame search, pre-sync, synchronization, protection, the function of each state)                         
                            - 2012-11-08 11:05:55下载
- 积分:1
 
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                        steper motor
                        
                          stepper motor module on spartan 6 and 24MHz clock fequency                         
                            - 2019-03-10 15:44:31下载
- 积分:1
 
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                        verilog_DATA_displays
                        
                          使用verilog语言,滚动显示“verilog”字符串程序代码及相关说明(Using verilog language, scrolling display " verilog"  string code and instructions)                         
                            - 2014-01-16 10:49:55下载
- 积分:1
 
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                        11bit_Barker_code
                        
                          设计11位巴克码序列峰值检测器,巴克码相关器原理:巴克码相关器能够检测巴克码序列峰值,并且能够在1bits错误情况下检测巴克码序列峰值。(A 11-bit Barker code sequence peak detector is designed. The principle of Barker code correlator is that the Barker code correlator can detect the peak value of Barker code sequence and detect the peak value of Barker code sequence in the case of 1 bits error.)                         
                            - 2020-06-21 14:00:01下载
- 积分:1
 
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                        calibration
                        
                          CS5460校准程序,控制器为C8051F310,SPI通信协议,可以作为电表芯片示例(CS5460 calibration procedure, the controller for the C8051F310, SPI communication protocol, as the meter chip sample)                         
                            - 2011-08-05 00:42:09下载
- 积分:1
 
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                        FDMA
                        
                          实现FDMA的仿真,3路输入信号,FFT输出(FDMA simulation input signal, FFT output)                         
                            - 2020-11-12 20:49:43下载
- 积分:1
 
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                        circuit_timing
                        
                          verilog延时电路的不同写法,和综合能否。可对比学习(Different wording verilog delay circuit, and comprehensive ability. Comparable learning)                         
                            - 2014-05-14 18:02:44下载
- 积分:1
 
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                        cam2
                        
                          DE2-115 + D5M Camera to VGA PC                         
                            - 2020-07-09 19:48:55下载
- 积分:1