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jiaotongdeng
交通灯通过数码管显示,几种模式可调,还可以时间可设,适合初学者入门参考学习。(LED traffic lights can be set to several modes adjustable time beginners reference ~ ~ ~)
- 2013-08-25 10:02:34下载
- 积分:1
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adder16b
说明: 潘松那本书上用vhdl语言描述的16位并入并处加法器(Pan book vhdl language used to describe the 16-bit adder into his)
- 2009-07-23 17:02:22下载
- 积分:1
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wirebus总线nand flash controller
wirebus总线nand flash controller,基础入门控制器,内存管理,fpga实现。已编译通过。编译平台quartus ii
- 2023-02-28 07:40:03下载
- 积分:1
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m68000
VHDL code for MC68000
- 2011-06-21 17:17:00下载
- 积分:1
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SOPC_PCI
基于FPGA的pci总线接口设计。。。。。。。。。。。。。(FPGA-based PCI bus interface design)
- 2012-03-28 13:55:33下载
- 积分:1
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test_uart
基于fpga的uart串口通信协议,64位数据(Uart communication protocol based on fpga, 64-bit data)
- 2017-08-09 17:35:47下载
- 积分:1
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VGA
VHDL语言实现VGA的显示彩条横条九宫格的功能。(VGA display color of the VHDL language bar Jiugongge function.)
- 2013-05-07 10:04:10下载
- 积分:1
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dingshi
定时器加数码管显示源码,以及test bench测试模块源码,经modelsim仿真结果正确(Timer plus digital display source code, and test bench test module source code, by modelsim simulation results are correct)
- 2013-07-27 10:34:41下载
- 积分:1
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Xilinx-Timing
Xilinx FPGA 时序约束资料,原厂出品,经典不需要理由(Xilinx FPGA timing constraint information, original, classic no reason)
- 2013-05-17 09:31:26下载
- 积分:1
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ahdl--sine-wave-code-with-rom-look-up-table_imp
hi this is an verilog codes
- 2011-11-11 14:30:21下载
- 积分:1