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zongbian4
基于verilog语言的差分曼彻斯特编码,内包含数据的采集,CRC校验(8位),和编码,输出。附有完整的工程文件。可直接调用modelsim仿真。(Based on differential Manchester encoding verilog language, and contains data collection, CRC check (8), and coding. With complete project file. Modelsim simulation can be called directly.)
- 2021-03-04 09:59:32下载
- 积分:1
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13.2_MotionDetec
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,基于视频的运动检测(System Generator based image processing engineering, multimedia processing on FPGA source code, based on video motion detection)
- 2020-10-23 20:57:22下载
- 积分:1
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crc校验,经验证正确,下载就可直接用,有不足的地方可以指正,
crc校验,经验证正确,下载就可直接用,有不足的地方可以指正,-CRC check, certified correct, you can download directly, there are deficiencies can correct me,
- 2022-10-07 11:55:03下载
- 积分:1
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Interpolation-in-Digital-Modems
Farrow 滤波器设计经典文章,作者是:FM.Gardner,farrow滤波器设计的始祖,经典值得推荐!(两篇文章)(Farrow filter design classic article, the author is: FM.Gardner, farrow filter design ancestor, classic worth recommending! (Two articles))
- 2013-11-15 17:57:22下载
- 积分:1
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cordic
基于cordic算法的DDS的Verilog代码。经过仿真验证,绝对可靠。(Based on cordic algorithm DDS Verilog code. Through the simulation, is absolutely reliable.)
- 2013-12-20 17:22:38下载
- 积分:1
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Synthesizable model of Atmel Application of ATmega103 mi crocontroller. (VHDL IP...
Synthesizable model of Atmel ATmega103 microcontroller. (VHDL IP)-Synthesizable model of Atmel Application of ATmega103 mi crocontroller. (VHDL IP)
- 2022-02-12 19:56:59下载
- 积分:1
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FPGA-design-and-application
已经正式出版,西安电子科技大学出版社,FPGA设计及应用,作者褚振勇(Has been officially published, Xi' an University of Electronic Science and Technology Publishing House, FPGA design and application, the author Zhezhengyong)
- 2009-06-03 15:57:31下载
- 积分:1
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《Verilog HDL 程序设计教程》6
《Verilog HDL 程序设计教程》6-"Verilog HDL Design Guide" 6
- 2022-02-21 13:38:55下载
- 积分:1
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fifo16_16
异步的fifo,写时钟和读时钟相互独立,能够对数据进行缓存处理。希望对大家有用(Asynchronous fifo, write clock and the read clock independent of each other, capable of processing the data cache. I hope useful)
- 2020-10-26 10:49:59下载
- 积分:1
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康塔多0至999的VHDL接口7段显示
应用背景此应用程序是用Xilinx ISE 12.4,使用VHDL语言进行。本程序的目的是提供一个显示的接口方法的七段显示。用户将可以看到从0到9999的一个计数器,它运行在利用FPGA内部的时钟实时。享受它。关键技术现场可编程门阵列(FPGA)是半导体器件是基于一个可配置逻辑块(CLB)连接矩阵通过可编程互连。FPGA可编程所需的应用或功能要求后制造。这功能区分FPGA从特定应用集成电路(ASIC),这是制造的特定设计定制任务。虽然一次性可编程(OTP)FPGA,这主要类型是基于SRAM的可重新编程的设计演变。
- 2022-03-20 03:34:16下载
- 积分:1