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matrix_class
it is a matrix library. it is needed for fir fier.
- 2014-08-29 22:29:24下载
- 积分：1
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VHDL-DDS
基于FPGA的DDS信号源设计，32位相位累加器，产生可调频率(FPGA-based DDS signal source design, 32-bit phase accumulator to generate tunable frequency)
- 2013-06-27 15:16:15下载
- 积分：1
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低功率的可逆逻辑乘8
本文提出了一种新颖的可逆乘法器。可逆逻辑可以发挥重要作用
- 2023-01-29 11:35:03下载
- 积分：1
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ModelSim Quick Start Guide, incidental text in an example of source code.
modelsim快速入门教程，附带文中范例源代码。-ModelSim Quick Start Guide, incidental text in an example of source code.
- 2023-05-02 04:50:04下载
- 积分：1
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16_QAM
用verilog 语言编译16QAM调制(a great complied code of 16QAM modulation for OFDM)
- 2013-09-02 16:23:40下载
- 积分：1
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RS-422standardmodulev2
rs422标准通讯模块 异步收发 verilog语言编写(rs422 standard communication module asynchronous receiver verilog language)
- 2013-12-23 14:14:18下载
- 积分：1
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VHDL语言100例详解，北京理工大学ASIC研究生出版，这里是1
VHDL语言100例详解，北京理工大学ASIC研究生出版，这里是1-20个examples-VHDL language of 100 cases explain, Beijing Institute of Technology, Graduate ASIC published examples here is 1-20 months
- 2022-05-22 16:09:28下载
- 积分：1
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dot_product
实现矩阵相乘，即点积运算，为VERILOG语言。可以根据自己的需要改变维数，采用了流水线的结构(Achieve matrix multiplication, ie dot product operations, for VERILOG language. You can change the dimension according to their needs, using a pipeline structure)
- 2015-01-27 10:52:52下载
- 积分：1
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verilog_422
标准RS422 Verilog源代码， 传输波特率可以修改， FPGA上可以工作(Standard RS422 verilog communication source code, buardrate can be updated and it is fully work in FPGA )
- 2021-04-06 14:29:02下载
- 积分：1
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paidui
排队电路设计，适用于EDA大作业，大学生适合使用，初学者，仅仅是vhdl的语言，可以借鉴(Queuing circuit design, suitable for EDA operation, college students suitable for use, beginners, only the language of VHDL, can learn from)
- 2017-12-10 23:47:23下载
- 积分：1
