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ModelSim_
FPGA编写环境,具有仿真容易,软件内存小的特点(FPGA authoring environment, with easy simulation software features small memory)
- 2013-07-24 19:20:57下载
- 积分:1
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clock
EDA用maxplus2开发设计的简易数字钟,适合初学者,vhdL语言(EDA maxplus2 in development and design of simple digital clock, is suitable for beginners, vhdL language
)
- 2011-10-03 20:50:23下载
- 积分:1
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Service-Manual-LG-TV-LCD-DISPLAY-models-2011
Service Manual LG TV LCD DISPLAY models 2011
- 2012-11-22 10:26:51下载
- 积分:1
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VERILOGFIFO
FIFO的verilog描述(Verilog description of the FIFO)
- 2009-04-12 18:06:50下载
- 积分:1
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aderr 约 4 位
该文件.RAR它有关的4加法proyect - 位这proyect使用,以12和4列,为您proyect。
- 2022-03-05 22:45:11下载
- 积分:1
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jpeg_fpga
基于FPGA的JPEG解码,对开发图片解码的人有用。(FPGA-based JPEG decoding, the development of image decoding useful.)
- 2014-02-24 09:19:22下载
- 积分:1
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altremote_update_cyclone5
altera remote updata cyclone5 平台例程,无nios核版本(altera remote updata cyclone5 platform routine
do not use nios)
- 2021-04-23 17:38:47下载
- 积分:1
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基于basys3的推箱子游戏
基于FPGA的游戏实例,开发板为Xilinx的basys3,VGA显示(Basys3, VGA Display of Xilinx Development Board Based on Game Example of FPGA)
- 2021-03-12 13:09:25下载
- 积分:1
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system
清华大学电子课程设计:Verilog,QuartusII可正确运行,可下载到FPGA上,完成远程通信的整体任务,PC发数据,键盘输入运算符与运算数计算将结果显示在数码管上并返回给PC机,需异步串口调试软件(Verilog, QuartusII run correctly, can be downloaded to the FPGA, to complete the overall task of remote communication, PC send data, keyboard operators and operands calculation displays the results in digital tube and returned to the PC, to be asynchronous serial debugging software)
- 2020-08-16 23:38:25下载
- 积分:1
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sdram verilog
sdram FPGA verilog设计 有源码有设计文档
- 2023-04-21 03:40:04下载
- 积分:1