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subway-ticket-vending-system
本设计是基于FPGA设计一个地铁自动售票系统。 本设计采用自顶向下的模块化设计方法,基于FPGA使用VHDL语言设计制作一个地铁自动售票控制系统,该系统能出售2条线路3种不同价位的票,完成售票、找零、显示等功能。(The design is based FPGA design of a subway ticket vending system. This design uses a top-down, modular design method, a subway ticket vending control system based on FPGA using VHDL language design, the system can sell two lines of different priced tickets, complete the ticket, give change, display and other functions .)
- 2013-02-27 12:59:49下载
- 积分:1
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图书馆的IEEE
LIBRARY IEEE
USE IEEE.STD_LOGIC_1164.ALL
USE IEEE.STD_LOGIC_ARITH.ALL
USE IEEE.STD_LOGIC_UNSIGNED.ALL
- 2022-03-24 00:58:30下载
- 积分:1
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D触发器的基本功能的理解及应用,特别是记忆传输功能使用WAIT语句编写地理解...
D触发器的基本功能的理解及应用,特别是记忆传输功能使用WAIT语句编写地理解-D flip-flop understanding of the basic functions and applications, in particular the memory transfer function using the WAIT statement is prepared to understand
- 2022-01-26 05:04:12下载
- 积分:1
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RAM控制的VHDL实现 真的很有用
RAM控制的VHDL实现 真的很有用 -VHDL implementation of the RAM control true true useful useful
- 2023-09-01 03:40:03下载
- 积分:1
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c4gx_f896_host_ddr2a_odt
ALTERA PCIE FPGA开发板(EP4C平台)DDR2内存测试代码(ALTERA PCIE FPGA development board (EP4C platform) DDR2 memory test code)
- 2011-09-07 11:57:21下载
- 积分:1
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ps2_interface
封装PS2接口驱动,用verilog编写!适用于键盘,鼠标等PS2接口的器件。(failed to translate)
- 2013-05-05 10:48:42下载
- 积分:1
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altera公司cycloneII全系列说明书,实用
altera公司cycloneII全系列说明书,实用-altera" s cycloneII a full range of manual, practical
- 2022-02-04 11:53:16下载
- 积分:1
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Verilog计数器、编码器、加法器
verilog编码器、计数器、加法器的程序(Verilog encoder, counter, adder procedures)
- 2019-01-26 21:50:01下载
- 积分:1
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Modulator70
个人参与的某国家工程并行排序MATLAB程序,用于FPGA的RTLAB仿真,使用Simulink工具生成HDL代码。测试可用。(Individuals involved in sort of a national engineering parallel MATLAB programs for the FPGA RTLAB simulation, using the Simulink tool to generate HDL code. Test available.)
- 2011-07-29 15:16:30下载
- 积分:1
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a cycle ruduandency code
实现一个循环冗余码,是老师给的例子,别的同学已经验证-a cycle ruduandency code
- 2023-04-27 23:30:03下载
- 积分:1