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claa
vhdl code for carry lookahead addder
- 2014-02-05 00:26:26下载
- 积分:1
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thesis
thesis for simple virus detection processor which is developed in xilinx
- 2015-02-18 23:51:11下载
- 积分:1
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04_led_test
FPGA控制外边led,并实现跑马灯等多种效果,用户可以自行控制(FPGA control outside led)
- 2020-06-16 09:40:02下载
- 积分:1
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遥控器接收解码电路
设计遥控器接收解码电路。该电路接收编码后的串行数据,解码输出数据。电路接收
到的串行数据的格式为: 4 位同步码“ 1010”, 4 位数据(高位在前), 1 位奇校验码(对前 8 位数据校验)(Design of remote control receiver decoding circuit. The circuit receives the encoded serial data and decodes the output data. The format of the serial data received by the circuit is: 4 bit synchronous code "1010", 4 bit data (high in the front), 1 bit parity check code (check for the first 8 bits of data))
- 2017-11-27 15:10:34下载
- 积分:1
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VHDL描述的自定义交织器
交织器主要是对输入数据按照一定的规则打乱以便减少数据中过长的连0或者连1的出现。交织矩阵为行列矩阵,msgin为输入比特,msgout为交织输出比特,row和rol为交织器的行和列,可以通过改变col改变交织深度。先把输入的比特流数据改变为一个矩阵,再按照一定的方式输出为比特流数据
- 2022-03-15 22:36:53下载
- 积分:1
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SAR-ADC
Complete Successive approximation Analog to digital converter along with the source code
- 2013-04-21 23:42:03下载
- 积分:1
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Mashayan
rebuild file in check for
- 2018-01-27 16:36:35下载
- 积分:1
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8位十进制频率计,通过验证,目标芯片EPF10KLC84
8位十进制频率计,通过验证,目标芯片EPF10KLC84-4-8 decimal Cymometer through authentication, the target chip EPF10KLC84-4
- 2022-07-15 16:44:52下载
- 积分:1
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PAL_VGA
基于FPGA的PAL_VGA转换器的实现.pdf(FPGA-based PAL_VGA converter implementation)
- 2009-03-17 14:13:36下载
- 积分:1
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deng
HDL verilog 电子密码锁 输入错误后有报警 输入正确后有提示(HDL Verilog electronic code lock input errors have prompted alarm input is correct)
- 2012-06-27 19:25:53下载
- 积分:1